UART0 doesn't work correctly on entering low power mode on a K60

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UART0 doesn't work correctly on entering low power mode on a K60

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Gra67
Contributor III

Hello

I'm using a K60 and MQX 3.8 on a project which enters low power mode (VLPR / WAIT). The board and most of the UARTs work fine, but UART0 doesn't re-calculate its baud rate correctly.

I enter low power mode using the following code:

_lpm_set_clock_configuration(BSP_CLOCK_CONFIGURATION_2MHZ)     // drops core and bus clock to 2Mhz    

_lpm_set_operation_mode (LPM_OPERATION_MODE_WAIT)     // enters VLPR mode

I also went into Init_sci.c and edited the _bsp_sciN_operation_modes() functions to allow all the UARTs to handle low power mode.

On entering low power mode the core/system clock changes from 96000000 to 2000000 and the bus clock changes from 48000000 to 2000000. The software runs fine and UARTS2-4 still work at the original baud rate, however UART0 changes from 9600bps to 125Kbps. Interestingly 125Kbs is the maximum baud rate in VLPR mode.

The MQX code appears to treat all the UARTs the same. The only difference I can see is that UART0 & UART1 operates from the system clock and the other UARTs operate from the bus clock.

I know the errata document states that VLPR mode is not fully supported in our version of silicon, but it does seem to work reliably with the exception of UART0.

Can any of you guys help?

Regards

Graeme

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TugboatCaptain
Contributor III

Hello Graeme,

In my experience, when the serial driver comes out of low power mode, its baud rate is restored to BSPCFG_SCI0_BAUD_RATE, i.e. whatever you have in the "const KUART_INIT_STRUCT _bsp_sci0_init" structure (in init_sci.c), not to the current setting.  It is likely that yours is being restored to 115.2 Kbps, the default setting.  If you set the baud at run time you will need to set it again upon return to the run mode.

Regards,

Cap'n

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Gra67
Contributor III

Hi David

Thanks for the post, but unfortunately I've already done this change.

It encouraging you have it working though as it may well just be a problem in our silicon. Could you tell me the processor and mask-set number you are using please? Ours is "MK60DN512Z VMD10" and "4N30D" which indicates a rev 1.x which has an errata on aspects of low power mode.

Regards

Graeme

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apanecatl
Senior Contributor II

You are right Graeme, you need to use a latter silicon revision (2.x), since the VLPR mode was not fully characterized in the first silicon versions there are hardware problems lacking a workaround, so our recommendation is to move forward into rev 2.x, check the following document in case you decide to do so:

http://cache.freescale.com/files/32bit/doc/app_note/AN4445.pdf

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DavidS
NXP Employee
NXP Employee

Hi Graeme,

I'm using new silicon so as you mention it may be you need the Rev2 silicon.

I'm using the TWR-K70 "PK70FN1M0VMJ12" and "0N96B".

Regards,

David

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DavidS
NXP Employee
NXP Employee

Hi Graeme,

I used a TWR-K70 for testing of the Low Power demo in the MQX3.8/mqx/examples/lowpower project.

I configured the UART0 Tx only to come out on PTD[7] so that I could jumper it to the TWR-SER2 Rev A J4-pin 3 which feeds the DB9 connector.

I too had it failing at first but with further digging I found that I needed to update a structure in the BSP (init_sci.c) for the lowpower operations.

Here is the change I had to make:

 

#if

MQX_ENABLE_LOW_POWER 

const

KUART_OPERATION_MODE_STRUCT _bsp_sci0_operation_modes[LPM_OPERATION_MODES] = 

#if 1 //DES 1=test of UART0 on TWR-K70 jumpered to TWR-SER2,0=default code

 

/* LPM_OPERATION_MODE_RUN */ 

{

IO_PERIPHERAL_PIN_MUX_ENABLE | IO_PERIPHERAL_CLOCK_ENABLE | IO_PERIPHERAL_MODULE_ENABLE,

0,

0,

0

},

/* LPM_OPERATION_MODE_WAIT */ 

{

IO_PERIPHERAL_PIN_MUX_ENABLE | IO_PERIPHERAL_CLOCK_ENABLE | IO_PERIPHERAL_MODULE_ENABLE,

0,

0,

0

},

/* LPM_OPERATION_MODE_SLEEP */ 

{

IO_PERIPHERAL_PIN_MUX_ENABLE | IO_PERIPHERAL_CLOCK_ENABLE | IO_PERIPHERAL_MODULE_ENABLE | IO_PERIPHERAL_WAKEUP_ENABLE | IO_PERIPHERAL_WAKEUP_SLEEPONEXIT_DISABLE,

0,

0,

0

},

/* LPM_OPERATION_MODE_STOP */ 

{

IO_PERIPHERAL_PIN_MUX_DISABLE | IO_PERIPHERAL_CLOCK_DISABLE,

0,

0,

0

}

 

#else

 

/* LPM_OPERATION_MODE_RUN */ 

{

IO_PERIPHERAL_PIN_MUX_DISABLE | IO_PERIPHERAL_CLOCK_DISABLE,

0,

0,

0

},

/* LPM_OPERATION_MODE_WAIT */ 

{

IO_PERIPHERAL_PIN_MUX_DISABLE | IO_PERIPHERAL_CLOCK_DISABLE,

0,

0,

0

},

/* LPM_OPERATION_MODE_SLEEP */ 

{

IO_PERIPHERAL_PIN_MUX_DISABLE | IO_PERIPHERAL_CLOCK_DISABLE,

0,

0,

0

},

/* LPM_OPERATION_MODE_STOP */ 

{

IO_PERIPHERAL_PIN_MUX_DISABLE | IO_PERIPHERAL_CLOCK_DISABLE,

0,

0,

0

}

 

#endif

 

};

Regards,

David

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