TWR-K60F120M and PHY dp83640

[aroste]

Hi,

I have the tower system TWR-K60F120M + TWR-SER.  I tried the BSP demo "httpdsrv" software and it works fine. I can see in the code and settings that it is in RMII mode.

Now I want to connect to a demo board for the TI DP83640 PHY PTP. I changed in the code and the links to compile with "phy_dp83xxx". 

The demo software doesn't work. I get the 100Mb network connection and, the link led, speed led and act blinking.

I changed to remove the define RMII mode (ENET_OPTION_RMII) because I want it works in MII. I checked different things in the config and boards, here some unresolved questions:

1. Someone has some experience with that ?
2. Are the MII TX2, TX3, RX2 and RX3 going out to the tower connection J7 A ? 
   On the schematic it is confusing, ETH_TXD3 (and 2, RX3 and 2) seems to not be routed on the uC.
3. uC is clocked by 50Mhz, and PHY by 25Mhz. Should I change something on uC settings ?
4. ?

I use the latest MQX (4.0.1) and CW (10.4)

thanks

[Kan_Li]

Hi,

TWR-K60F120M just supports RMII interface as some signals for MII are used for other purpose, so please use it for RMII application. The 50MHz external clock is a MUST option for RMII mode, it is also ok to use 8MHz when using the MII interface instead .

Hope that helps,

B.R

Kan

[aroste]

Good morning,

Many thanks for your answer, I understand now why I didn't succeed.

Is it not possible to use the Tx/Rx lines that are on the other connector (ULPI_DATAx) to do MII ?

Some changes needed then on the project file, BSP configuration ?

Thanks

Stephan

[Kan_Li]

No， it is not possible to use TWR-K60F120M for MII connnection, but if you want it in that way, you may have to design a custom board for it. You may copy most of TWR-K60F120M except the Ethernet connection, and do some modification in the BSP, such as adding pin function initialization, and PHY configuration, etc.

Hope that helps,

B.R

Kan

[aroste]

Hi,

Oh that's not good for me. Could you tell me what are the reasons for that ?  (in the big lines) 

I would like to understand and that will help me to design my new board. I'm testing that part to finalize and validate my schematic. I checked and I didn't see any reason that I could not use it. I don't use the JTag (trace lines) and I changed the lines configuration in Mux(ALT4). I'm doing that now and changing the cabling, not yet testing.

About the BSP software it is a unknown situation for me if there is any "driver" issue that might not be working in MII.

About my configuration:

I use the USB to connect and debug on CW, on the final circuit I planned to use the JTag connection without the TRACE lines and use them for MII.

Thanks in advance for your answer.

Stephan

[Kan_Li]

for example, the following signals are needed by MII,

but the pins related with them are not routed out from the MCU, though the package for this device is LQFP, it might be a little bit easier to solder wires between them , but excellent soldering skill is required, and even these can be achieved, timing issue is still possible to happen. so I would like to recommend you start to design a custom board for that purpose.

[aroste]

Yes you are right for that, they are not routed on connector AB with those names.   But if you look from uC side they are routed on connector CD side with names ULPI_DATA 0 to 7 and ULPI_STP.

I checked all connections and the only things, I just found out right now, are the lines PTA10, 11, 28 and 29 (ULPI_DATA..) that are used to set level '0' to the leds D7, 8, 11 and 12.  I can see them blinking now and it certainly affect my signals..  I will try to just remove the P3V3 resistor connection.

What do you think?

thanks

Stephan

+41324883692

[Kan_Li]

Hi Stephan,

Yes, you are right. I didn't notice the CD side, these connected signals would help to implement the MII interface easily, so you may design a custom board like TWR-SER to implement MII interface, but if you have a ready demo board , you might have to solder wires between them, if so, please keep the wire length as same as possible, you know, for example, if the trace length between FEC_TXD2/3 and FEC_TXD1/0 is different , that might cause timing issue during communication.

Hope that helps,

Have a nice day!!

B.R

Kan

[aroste]

Hi,

I was on holidays.

Thanks for your reply, I will keep in mind your recommendations.

Furthermore, do you have some experience by using the DP83640 from TI ?   Or someone in Freescale ?

I got this, "DP83640 Software Design Guide and C Software Reference Library", but I stuck now on how to use and implement it.

I have to setup the PTP slave with this PHY.

BR

stephan

[aroste]

I quick update to tell you I got it working in MII.  I did like I explained to you in the previous message.  For the leds I just removed them to clear the lines.

Next challenge will be program PTP with this PHY.

Thanks an best regards

-stephan-