Hi Mark,
PWM is generated on PTC10 and PTC11.
Output is coming, the problem is with stopping PWM after 32 pulses.
/*********************************** My Init Function ******************************************/
e_PWM_Error_t BANSHI_PWMcomp_NonInverting_Init( c_FlexPwm** this, uint32_t ftmId, uint8_t channelId)
{
e_PWM_Error_t retVal = kPWMErrorFailed;
uint32_t uFTMhz;
uint16_t uMod = 0;
uint8_t ftmParamIndex = INVALID_FTM_PARAM_INDEX;
do
{
if((NULL == this)|| (MAX_FTM_INSTANCES <= ftmId) ||
(MAX_FTM_CHANNELS <= channelId))
{
break;
}
ftmParamIndex = BANSHI_PWM_getFtmFreeParamIndex( channelId );
if (INVALID_FTM_PARAM_INDEX == ftmParamIndex)
{
break;
}
*this = &l_FlexPwm[channelId];
(*this)->m_ftmId = ftmId;
(*this)->m_channelId = channelId;
(*this)->m_ftmParam = NULL;
FTM_HAL_SetWriteProtectionCmd(g_ftmBase[(*this)->m_ftmId], false);
(*this)->m_ftmParam = &ftmParamArray[ftmParamIndex];
(*this)->m_ftmParam->mode = kFtmCenterAlignedPWM;
switch (ftmId)
{
case 3:
FTM3_SC = 0x00;
FTM3_CONF = 0xC0;
FTM3_POL = 0x0;
FTM3_OUTMASK=0xFF;
FTM3_SC =0x0;
FTM3_MODE |= 0x5;
break;
default:
continue;
}
FTM_HAL_SetDualChnCompCmd(g_ftmBase[(*this)->m_ftmId],
FTM_HAL_GetChnPairIndex(channelId), false);
FTM_HAL_SetDualChnPwmSyncCmd(g_ftmBase[(*this)->m_ftmId],
FTM_HAL_GetChnPairIndex(channelId), true);
FTM_HAL_SetChnEdgeLevel (g_ftmBase[(*this)->m_ftmId],channelId,ELSA);
FTM_HAL_SetChnEdgeLevel (g_ftmBase[(*this)->m_ftmId],(channelId+1),
ELSA);
FTM_HAL_SetChnMSnBAMode (g_ftmBase[(*this)->m_ftmId],channelId, MSB);
FTM_HAL_SetChnMSnBAMode (g_ftmBase[(*this)->m_ftmId],(channelId+1),
MSB);
FTM_HAL_SetChnCountVal (g_ftmBase[(*this)->m_ftmId],channelId,
COUNTER_INIT_VALUE);
FTM_HAL_SetChnCountVal (g_ftmBase[(*this)->m_ftmId],(channelId+1),
COUNTER_INIT_VALUE);
FTM_HAL_SetFaultInputCmd(g_ftmBase[(*this)->m_ftmId],channelId/2,true);
switch (ftmId)
{
case 3:
//set the FAULT bits as 11, automatically clearing the faults
FTM3_MODE |= 0x60;
FTM3_SYNC = 0x2;// set sync point at mayimum CNTMAX=1
FTM3_SC = 0x8;
FTM3_EXTTRIG |= FTM_EXTTRIG_INITTRIGEN_MASK;
break;
default:
continue;
}
FTM_DRV_SetClock((*this)->m_ftmId, kClock_source_FTM_SystemClk,
kFtmDividedBy1);
uFTMhz = FTM_DRV_GetClock((*this)->m_ftmId);
if (0 == (*this)->m_ftmParam->uFrequencyHZ)
{
break;
}
uMod = uFTMhz / ((*this)->m_ftmParam->uFrequencyHZ) - 1;
FTM_HAL_SetMod(g_ftmBase[(*this)->m_ftmId], uMod);
(*this)->m_PwmState = kFlexPwmStateDisabled;
retVal = kPWMErrorOK;
}while(false);
return retVal;
}
/***********************************************************************************/
Please let me know if any changes in register level values.
Regards,
Aniket