Should I set all other GPIO to input mode before going to VLLS0?

[markosiponen]

My application is going to use VLLS0 and wake up on a falling edge on PTD4/LLWU_P14.

Should I set all other GPIO to input mode before going to VLLS0?

AN4503 says the following:

Reduce pin loading of the MCU. When the MCU sources current through the output pins, the power is being

sourced through MCU_VDD. This is most evident when you output high frequency signals to an output pin as

you might with the FlexBus clock and address/data pins.

[eduardo_viramon · Accepted solution]

markosiponen,

There is no need to modify GPIO settings. Remember that Kinetis devices have a pin mux that controls the pin functions, and they are not configured as GPIO by default. Any unused pin should simply not be configured and that'll be the least drain. In the case of hardware, best to keep it unconnected.

The note in the app note refers to pins that are already connected as outputs. What it is recommending is that to save power, those used pins should be configured to the state that drains least current, this state is different from circuit to circuit.