Hello nikivendola:
In the I2Cx_F register definition from the Reference Manual you can find the formula to get the I2C baudrate:
bus speed: Depends on your clock configuration (MCG module). For MK10DN512ZVLL10 the default bus clock frequency out of reset is 20.97152 MHz.
mul: It can be 1, 2 or 4 depending on the setting of the I2Cx_F[MULT] bits (00, 01 or 10):
SCL divider: According to I2Cx_F[ICR] (bits 5-0) there is an associated divider value specified in the table I2C divider and hold values:
EXAMPLE:
- To get a 100 kHz I2C bus frequency using the default bus clock frequency you can use the next values:
bus speed = 20.97152 MHz
MULT = 01 -> mul = 2
ICR = 0x16 -> SCL Divider = 104
I2C Baud Rate = 20.97152 MHz / (2 x 104) = 100.824 kHz
- About arbitration and clock synchronization there should not be any issues with only 2 devices (Master and Slave), unless the slave behaves erroneously and pulls the SDA line LOW in a wrong moment.
I hope this helps!
Best Regards!
Jorge Gonzalez
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Hello, thank you for your response.
As it is a program that I passed to another person it is possible that this may have set the clock to 48 MHz?
Referring to register I2Cx_SMB
The timeout must be 35 ms (then I have to consider for strength), but the clock to calculate formulas and SHTF1 SHTF2) is always the 48MHz?
SHTF1 I need to figure out who the bus is free while the SHTF2 I note there are problems with the transmission?
Of course also the SLTF dovo set to 1 ...
While for the ACK and the NACK (no CRC):
I have to set the Txak 0 and FACK 1. Any ack I read on RXAK? To read the RXAK I have to check the TCF?
The TCF sets it automatically when the micro after receiving byte or I have to think I?
Rx I 8th bits that end up on 'I2Cx_D, the 9th of ack I read on RXAK?
I can ignore the interrupt to do a broadcast basis?
The busy bit dell'I2Cx_S can I avoid having a single control pocihè master know if tx or receive. However, this field would always written by the micro or I have to set a communication between me and the other?
Best Regards
Hello nikivendola:
If the project has an early call to a SystemInit() function and it is using the macros shown in your screenshot (with the macro CLOCK_SETUP defined as 5) as well as the same external crystal (16 MHz) then yes it is likely that the bus clock is 48 MHz.
The way to confirm this is by checking the MCG register configurations. Refer to the MCG Chapter in the Reference Manual. Another option to verify the clock in your device is to use the TRACE_CLKOUT pin as explained by colleague Derek Snell in the next post:
Verifying Internal Clocks in Kinetis
About the SMB timeouts, the frequency used is the one selected by I2Cx_SMB[TCLKSEL]:
The I2Cx_S[BUSY] bit is set or cleared automatically by the I2C module according to the state of the bus.
About the ACK/NACK and the broadcast I am afraid I did not understand your questions.
Best Regards!
Jorge Gonzalez
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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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