SPI data transfer using DMA and PIT?

[santoshalagawad]

SPI data transfer using DMA and PIT

uC: MPC 5643

1. Want to send 5 SPI commands for 20 times with PIT configuration.

2. Configure PIT0 for time x and PIT1 for 20 * x and send first 5 SPI commands in DMA and retrigger the same set of commands for 20 times.

3. Once 20 iterations completed, PIT1 must trigger interrupt and disable PIT

4. This I am trying to achieve without software intervention, the software intervenation will be after 20 iteration to service the interrupt.

5. I am not able to achieve this with MPC56, How can achieve this? Is there any dependency

6. The PIT0 is not triggering DMA after first transfer, configured the registers in DMA_MUX, Once the PIT0 triggers DMA data transfer, do we need software intervantion or it is possible to send data transfer without software intervation?

[lukaszadrapa]

Hi,

yes, this can be achieved.

Use "Always enabled" together with PIT Trigger.

Configure the descriptor for Always Enabled channel in a way that it starts 5 SPI transfers - you can write to DMASERQ register to enable DMA channel which sends data to SPI. You should set d_req (disable request) bit to disable DMA channel after 5 bytes.

You can enable interrupt (int_maj bit) in descriptor for Always Enabled channel, so you will get an interrupt when last 5-byte SPI transfer is triggered.

Regards,

Lukas

[santoshalagawad]

Thank you Lukas,

I have some more questions.

1. I want to send 5 SPI Commands (May increase to 15 SPI Commands)of 32bit for 20 times, with help of PIT timer.(PIT1, PIT2)

2. For 5SPI commands, I have configured PIT2 and Source of DMA as SPI1 Tx for DMA channel 2(0,1,2)

3. To check the 20 times transfer, I have configured PIT1 with value as 20 * PIT2, PIT2 as ISR, once it raises ISR, I will read the buffer.

4. Will this work for retriggering of SPI commands or I need to do some software handling after 5SPI commands.

5. For Reception, how to handle the data (overflow) without intervention of software in between.