SPI baremetal on the frdm-k64f

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SPI baremetal on the frdm-k64f

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roel0
Contributor II

Hi

I'm trying to create my own SPI baremetal driver. But I was expecting a clock after the init because I set the continious clock register.

Why am I not seeing a clock on my oscilloscope?

[code]

int frdm_spi_init(SPI_Type *spi, struct frdm_spi_mode *mode, uint32_t hz) {

    if(mode->frame < FRDM_SPI_MIN_FRAME_SIZE) {

      return -1;

    }

    // Enable clock

    SIM_SCGC6 |= SIM_SCGC6_SPI0(FRDM_ENABLE);

    // For debug purpose

    SPI_MCR_REG(spi) &= ~SPI_MCR_CONT_SCKE_MASK;

    SPI_MCR_REG(spi) |= (FRDM_ENABLE<<SPI_MCR_CLR_RXF_SHIFT);

    // Master/slave

    SPI_MCR_REG(spi) &= ~SPI_MCR_MSTR_MASK;

    SPI_MCR_REG(spi) |= (mode->mode<<SPI_MCR_MSTR_SHIFT);

    if(mode->mode == FRDM_SPI_MASTER) {

      //Frame size

      SPI_CTAR_REG(spi,0) &= ~SPI_CTAR_FMSZ_MASK;

      SPI_CTAR_REG(spi,0) |= (((mode->frame-1) & 0x0F)<<SPI_CTAR_FMSZ_SHIFT);

      // Spi mode

      SPI_CTAR_REG(spi,0) &= ~SPI_CTAR_CPOL_MASK;

      SPI_CTAR_REG(spi,0) |= (mode->CPOL)<<SPI_CTAR_CPOL_SHIFT;

      SPI_CTAR_REG(spi,0) &= ~SPI_CTAR_CPHA_MASK;

      SPI_CTAR_REG(spi,0) |= (mode->CPHA)<<SPI_CTAR_CPHA_SHIFT;

      //Always in msb mode

      SPI_CTAR_REG(spi,0) &= ~SPI_CTAR_LSBFE_MASK;

    } else if(mode->mode == FRDM_SPI_SLAVE) {

      /*TODO*/

    }

    //frequency

    SPI_CTAR_REG(spi,0) &= ~SPI_CTAR_ASC_MASK;

    SPI_CTAR_REG(spi,0) |= 1<<SPI_CTAR_ASC_SHIFT;

    SPI_CTAR_REG(spi,0) &= ~SPI_CTAR_PASC_MASK;

    SPI_CTAR_REG(spi,0) |= 0<<SPI_CTAR_PASC_SHIFT;

    SPI_CTAR_REG(spi,0) &= ~SPI_CTAR_DBR_MASK;

    SPI_CTAR_REG(spi,0) |= 0<<SPI_CTAR_DBR_SHIFT;

   

    // Fifo

    SPI_MCR_REG(spi) &= ~SPI_MCR_DIS_TXF_MASK;

    SPI_MCR_REG(spi) != 0<<SPI_MCR_DIS_TXF_SHIFT;

    //Enable

    SPI_MCR_REG(spi) &= ~SPI_MCR_MDIS_MASK;

    SPI_MCR_REG(spi) != 0<<SPI_MCR_MDIS_SHIFT;

    // Start hardware

    SPI_MCR_REG(spi) &= ~SPI_MCR_HALT_MASK;

    SPI_MCR_REG(spi) |= 0<<SPI_MCR_HALT_SHIFT;

    return 0;

}

[/code]

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EarlOrlando
Senior Contributor II

Hello,

Please verify that you enabled the clock gate for the port and that you configured the signal multiplexing for the SPI clock signal, this is done in the PORTx_PCRn[MUX] register (please refer to the pinout table in the section 10.3 "Pinout" in the MK64F Reference Manual).

Also, I recommend you to take a look into the message Re: [Help]K64F SPI Bare Metal example which contains a working SPI example in baremetal for the MK64F MCU. It could be useful for you.

Best regards,

\ER.

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EarlOrlando
Senior Contributor II

Hello,

Please verify that you enabled the clock gate for the port and that you configured the signal multiplexing for the SPI clock signal, this is done in the PORTx_PCRn[MUX] register (please refer to the pinout table in the section 10.3 "Pinout" in the MK64F Reference Manual).

Also, I recommend you to take a look into the message Re: [Help]K64F SPI Bare Metal example which contains a working SPI example in baremetal for the MK64F MCU. It could be useful for you.

Best regards,

\ER.

View solution in original post

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roel0
Contributor II

Hi Earl,

Thanks for the input and the example! Indeed the multiplexing was not done yet.
Another mistake was a "auto-filling" mistake of my editor:

    SPI_MCR_REG(spi) &= ~SPI_MCR_CONT_SCKE_MASK;

    SPI_MCR_REG(spi) |= (FRDM_ENABLE<<SPI_MCR_CLR_RXF_SHIFT);

should be

    SPI_MCR_REG(spi) &= ~SPI_MCR_CONT_SCKE_MASK;

    SPI_MCR_REG(spi) |= (FRDM_ENABLE<<SPI_MCR_CONT_SCKE_SHIFT);

Kind Regards,

Roel

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