Hello Omar,
Thanks a lot for your kind and detailed reply.
It's checked that the VCC is always 3.28v after Power on. So the case here is not like LVD and POR mentioned 5.2.2
As external circuits, I put my schematics below for your reference.

Two Reset Circuits to check which one is OK. To do that, a Jumper link will be put on J5.
Neither did work when a Jumper link was put on. I meant voltage at /RST is 0.1v (link Pin 1 and Pin 2 of J5 ) after Power ON.Reset is 0v when Manual reset key press and 1v when reset key release (link Pin 1 and Pin 3 of J5) . by the way, Pin 1 in schematics here is in the middle position of J5 at PCB. If without the jumper link, both Pin 2 and Pin 3 of J5 is 3.28v after Power on, and /RST is still logic low. I'm wondering if mass erase ever implementation make this kind of situation.
a Pullup resistor is at PTA4, which can be seen from below circuitry. and clock as well.

Below is JTAG connection.

Below is VDD and VSS connection.

That's it. the MK10DX128VLL7 soldering orientation and related PINs (VCC, GND, Rest, Oscillator) soldering quality are all checked. no shortage no void soldering.
So strange. And I will check the signal with Oscilloscope later on today.
Thanks and Best regards
Charles