Hi mircopizzichini,
The current code for the MKW01 application demos is taking the CLKOUT from the Radio as the source clock for the MCU.
This external clock feeds the MCG and enables the PLL to work in the PEE mode.
Do you intend to not use this CKLOUT from the Radio as your MCU clock source?
If this is correct and you are planning to use the internal clock as the refernce for the MCG... you need to change
the MCG mode to FEI (FLL Engaged Internal)
So the current code where the application calls "MCG_Setup" is no longer necessary as this line configures the MCG as PEE.
What you want to do is:
1) In sysinit.c
- enable the following line:
#define NO_PLL_INIT
This will set the MCG to run from internal reference (FEI mode) @ 48MHZ Sysclk.
2) In main.c
- Platform_Init()
Comment out this line:
/*Initialize clock based on CLKOUT*/
// MCG_Setup();
Answering specifically the question about pll_val=0x11:
This is because the IREFST flag in MCG_S Register is set to one indicating that the source of FLL reference clock is the internal reference clock,
instead of an external ref clock that would set this flag to zero as expected by the application demos and thus pll_val would not fall in the 0x11 case.