A pull-up on SPI CS pins is 'generally recommended', but specifically because at power-up the chosen Kinetis pins will be floating, and not 'in control'. Once turned to their SPI CS function, they will be actively driven at all times. The recommended value (ideally) depends on 'worst case' leakage into pins, but a plain ol' rule-of-thunb for CMOS is 10K.
