Programming an MK60FN1M0VLQ12 with IAR Workbench and an IAR I-jet

[weblar]

Hi,

This is my first time posting on here so please be gentle with me.

I have a custom PCB containing an MK60FN1M0VLQ12 Kinetis processor. I've written some test code using IAR Embedded Workbench and I'm attempting to download the executable to the chip via an IAR I-jet JTAG debug probe. Unfortunately, I'm having no success whatsoever.

I've attempted to contact IAR Systems for help with this but after about 4 phone calls, I'm still waiting for someone to get back to me so I thought that in the mean time, I'd try on here.

Within IAR Workbench, when I click the "download and debug" button, an error message appears saying "Flash loader: Failed to setup call to 'FlashInit'". Now, I'm kinda guessing that maybe the flash loader that I've selected is wrong for the device however I don't believe that it is. After this error message appears, nothing further happens - no code is downloaded to the device.

I have opened up the Quick Start Demo code for the K60 Tower system and I've re-compiled and programmed that into the K60 Tower system using IAR and the I-jet and this works without any issues. The custom PCB is set up to use an external 8MHz crystal connected to XTAL0 and EXTAL0 and I'm 100% certain that there are no issues with the way that the JTAG signals are routed to the chip.

Has anyone had any experience with this? Has anyone successfully contacted IAR Systems and received useful help?

If I've not included enough detail in this, I can provide more.

Please help!

Thanks,

Kev

P.S. For reference, within IAR I've selected the device as "Freescale MK60FN1M0xxx12" and I've picked the "MK60FN1M0xxx12.ddf" device description file plus I've also selected the "FlashK60Fxxx128K.board" file as the flash downloader.

[Jeronimo479]

It seems I am in a similar boat as you. I just got our new board based on the K60DX256VMD10. I can load my code to a K61FX512VMD12 using either the PEMicro USB Multilink or the IAR iJet, but when I try to load code to my new target, I get Flash Loader error. Gee.... that was informative. I used a logic analyzer to prove to myself that the JTAG interface was communicating with the K60. My reset_b line looks exactly like yours.

Have you verified your linker file setup? If you flash loader has the wrong settings, out of range flash space for instance, then the loader will fail. I have already verified that with my linker file.

****************************************************************************************************************

/* Linker File for K60DX100VMD10 */

/*###ICF### Section handled by ICF editor, don't touch! ****/

/*-Editor annotation file-*/

/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */

/*-Specials-*/

define symbol __ICFEDIT_intvec_start__          = 0x00000000;

/*-Memory Regions-*/

/* 256KB Flash */

define symbol __ICFEDIT_region_ROM_start__      = 0x00000000;

define symbol __ICFEDIT_region_ROM_end__        = 0x0003FFFF;

/* 64KB SRAM */

define symbol __ICFEDIT_region_RAM_start__      = 0x1FFF8000;

define symbol __ICFEDIT_region_RAM_end__        = 0x20007FF0;

/* Sizes */

define symbol __ICFEDIT_size_cstack__   = 0x00;

define symbol __ICFEDIT_size_heap__     = 0;

/**** End of ICF editor section. ###ICF###*/

define exported symbol __EXTERNAL_MRAM_ROM_BASE = 0x70000000;

define exported symbol __EXTERNAL_MRAM_ROM_SIZE = 0x00000000;

define exported symbol __EXTERNAL_MRAM_RAM_BASE = 0x70000000;

define exported symbol __EXTERNAL_MRAM_RAM_SIZE = 0x00080000;

define exported symbol __EXTERNAL_LCD_BASE      = 0x60000000;

define exported symbol __EXTERNAL_LCD_SIZE      = 0x0001FFFF;

define exported symbol __EXTERNAL_LCD_DC_BASE   = 0x60010000;

define exported symbol __INTERNAL_FLASH_BASE    = 0x00000000;

define exported symbol __INTERNAL_FLASH_SIZE    = 0x00040000;

define exported symbol __INTERNAL_SRAM_BASE     = 0x1FFF8000;

define exported symbol __INTERNAL_SRAM_SIZE     = 0x00010000;

define exported symbol __UNCACHED_DATA_START    = 0x1FFF8000;

define exported symbol __UNCACHED_DATA_SIZE     = 0x00010000;

define exported symbol __UNCACHED_DATA_END      = 0x20007FF0;

define exported symbol __SRAM_POOL              = 0x1FFF8000;

/* 256KB FlexNVM */

define exported symbol __INTERNAL_FLEXNVM_BASE    = 0x10000000;

define exported symbol __INTERNAL_FLEXNVM_SIZE    = 0x00040000;

/* 4KB FlexRAM */

define exported symbol __INTERNAL_FLEXRAM_BASE    = 0x14000000;

define exported symbol __INTERNAL_FLEXRAM_SIZE    = 0x00001000;

define exported symbol __VECTOR_TABLE_ROM_START = 0x00000000;

define exported symbol __VECTOR_TABLE_RAM_START = __ICFEDIT_region_RAM_start__;

define exported symbol __DEFAULT_PROCESSOR_NUMBER = 1;

define exported symbol __DEFAULT_INTERRUPT_STACK_SIZE = 1024;

/* mem_init writes a storeblock_struct at the end of kernel data, max size 32 bytes, so use 0x100 offset */

define exported symbol __BOOT_STACK_ADDRESS        = __ICFEDIT_region_RAM_end__ - 0x100;

define exported symbol __KERNEL_AREA_START      = __ICFEDIT_region_RAM_start__;

define exported symbol __KERNEL_AREA_END        = 0x20007FF0;

define exported symbol __USER_AREA_START        = 0x20008000;

define exported symbol __USER_AREA_END          = __ICFEDIT_region_RAM_end__;

define exported symbol __KERNEL_DATA_END        = __ICFEDIT_region_RAM_end__;

define memory mem with size = 4G;

define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];

define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];

define block KERNEL_DATA with alignment = 8 { section .kernel_data };

define exported symbol __FLASHX_SECT_SIZE       = 0x800;

define exported symbol __FLASHX_END_ADDR        = __INTERNAL_FLASH_BASE + __INTERNAL_FLASH_SIZE;

define block CFMPROTROM with size = 20 { section .cfmconfig };

define block FLASHX_POOL with alignment = __FLASHX_SECT_SIZE { section .flashx };

define block TEXTSECTION with alignment = 4 { section .text };

keep { section .cfmconfig };

keep { section .flashx };

initialize by copy { readwrite };

do not initialize  { section .noinit };

do not initialize  { section .kernel_data };

do not initialize  { section .flashx };

place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec, block CFMPROTROM };

place in ROM_region { first block TEXTSECTION, readonly,  last block FLASHX_POOL };

place at address mem:__ICFEDIT_region_RAM_start__ { readwrite section .vectors_ram };

/* each block/segment must be in one line (association to region) because I need kernel data start after other datas */

place in RAM_region   { readwrite, last block KERNEL_DATA };