Hi,
For multiplexed pins, as you know that you assign a pin a specific function with configuring the PORTx_PCRy register. When you set the MUX bits as 0, it is analog function, when you set the MUX bits as 1, the pin will function as GPIO. Because of default pull up or down resistor enabled in the PORTx_PCRy register, the pin may see as high logic or low logic when the pin is float.
So for the first GPIO figure, the I/O voltage jump in different level, this is my analysis.
1)Enabling PORTx gated clock by writing corresponding bit in SIM_SCGCx reg.
2)for example,write the PORTx_PCRy register with MUX bits 1, you configure the GPIO pin in GPIO input mode, the case, the GPIO will be in INPUT mode, the default pull-up resistor will pull the GPIO pin logic to a middle level.
3)you write the GPIO direction register as output and output High logic, the GPIO pin voltage will jump to VDD.
In conclusion, pls check your code to configure the PORTx_PCRy and GPIO direction reg and GPIO output reg.
Hope it can help you
BR
XiangJun Rong