Pin default (high impedance) state and protection

[jh0]

Hi,

In device datasheet (Design considerations) there is...

Most of digital pins are disabled (in high impedance state) after power up...

Most? What pins are not in high impedance state after power up?

On (Design considerations) Figure 27. High voltage measurement with an ADC input, there is...

High voltage measurement circuits require voltage division, current limiting, and
overvoltage protection as shown the following figure. The voltage divider formed by R1
– R4 must yield a voltage less than or equal to VREFH. Typically, VREFH is
connected to VDDA. The current must be limited to less than the negative injection
current limit. Since the ADC pins do not have diodes to VDD, external clamp diodes
must be included to protect against transient over-voltages.

In my case I am measuring 0-7V, so there is voltage divider, and measured value is OK. I don't have place on PCB for external clamp diodes. Current to DAC is limited (by divider) to 0.5 mA. I guess that this is safe without using external diodes.

There are lot of pins with default ADC ALT state, and by note 'Since the ADC pins do not have diodes to VDD, external clamp diodes must be included to protect against transient over-voltages' it means that all this pins are not protected? Even not used for ADC? ADC pins (default ALT) are in Hi-Z?

What will be if 5V signal (limited to 1mA) is connected to micro pin (in default Hi-Z state) while VDD is 1.8V?

What is situation with empty (not existing / connected) ALT. For example with selected not-existing ALT7 pin will be ih Hi-Z?

Questions are related to K32L2A31, but situation is similar to any member of KL family.

Regards,

Josip

[jh0]

Hi Diego,

Now I see that most of the device pins with not existing ALT0 are in DISABLED default state. I guess that after power-up, with ADC gate clock disabled, ADC pins are in input floating (without pull up/down) state? For disabling all port pins (to Hi-Z) I should after power-up at program start select ALT7 for complete port C and D that are used for communication with other off-board devices?

Regards,

Josip

[diego_charles]

Hi @jh0 

Regarding your questions .

Now I see that most of the device pins with not existing ALT0 are in DISABLED default state. I guess that after power-up, with ADC gate clock disabled, ADC pins are in input floating (without pull up/down) state?

>>  Correct, The ADC pins do not have a pull up/down state.

For disabling all port pins (to Hi-Z) I should after power-up at program start select ALT7 for complete port C and D that are used for communication with other off-board devices?

>>I would not recommend to use ALT7 to disable pins. I have been checking with my colleagues, and actually, the ALT7 it is not guaranteed to do   this , becuase its effect it is not specified . 

Let me know if you have further questions.

Diego.

[jh0]

Hi Diego,

Just one more question regarding rest of the pins, after power up with (peripheral) gate clock disabled with default ALT0 (CMPx_INx, DACx_OUT, TSIO_CHx, EXTAL0, XTAL0). Are they also floating inputs like ADC pins?

Regards,

Josip

[diego_charles]

Hi @jh0 

Let me get back to you the following week with feedback , I am checking this with my colleagues.

Diego.

[diego_charles · Accepted solution]

HI @jh0 

I have received feedback :  the pins   CMPx_INx, DACx_OUT, TSIO_CHx, EXTAL0, XTAL0 and default analog pins (that have a default mux to ADC/DAC) are  in Hi-Z after reset. 

Regards,

Diego.

[diego_charles]

Hi @jh0 

I hope you are doing well

Regarding your questions:

>>What pins are not in high impedance state after power up?

Please refer to the table  Signal Multiplexing and Pin Assignments table of the DS , and check the Default column,  there you can see specifically  which pins are DISABLED at power up.

DISABLED indicates no function after reset, so that is High-Impedance.

>>In my case I am measuring 0-7V, so there is voltage divider, and measured value is OK. I don't have place on PCB for external clamp diodes. Current to DAC is limited (by divider) to 0.5 mA. I guess that this is safe without using external diodes.

It is hard to tell if your system will be immune to transient over voltages. The external clamp diodes  are a good safety feature to have.

>>There are lot of pins with default ADC ALT state, and by note 'Since the ADC pins do not have diodes to VDD, external clamp diodes must be included to protect against transient over-voltages' it means that all this pins are not protected? Even not used for ADC?

The ADC pins ( and all I/O ) still have an clamping diode to VSS for ESD protection. As this note from the datasheet indicates:  All I/O pins are internally clamped to VSS through a ESD protection diode.

>>ADC pins (default ALT) are in Hi-Z??

Pins that have the default ALT as ADC , are not in Hi-Z

>>What will be if 5V signal (limited to 1mA) is connected to micro pin (in default Hi-Z state) while VDD is 1.8V?

This will be out of the specification, When a pin is on a high impedance state , the voltage applied to the pin must not get above VDD+ .3.  

>>What is situation with empty (not existing / connected) ALT. For example with selected not-existing ALT7 pin will be ih Hi-Z?

That alternative will disable the  pin, so it will be in Hi-z.

If you have more questions, do not hesitate to let me know.

Diego