We use the MKV31F256VLH12 controller from NXP in a new design.
Programming takes place via the SWD interface.
Programmer: J-Link Plus from Segger.
Also an external watchdog with an open drain output is provided
in the circuit.
The watchdog output is separted over a 470R Resistor from the Reset Pin of the
controller.
The watchdog currently forces a reset approx. Every 400ms.
Unfortunately also during the programming cycle.
Is there a possibility that the programmer (J-Link Plus) keeps the RESET signal permanently high while the controller is being programmed?
A jumper between the output of the watchdog and the reset pin of the controller is not an option (lost / forgotten).
best regards
Helmut