OSC1 to PLL1 as MCGOUTCLK

[gurras]

Hi

We have developed a board using a MK10FX512 144-LQFP.

The clock is fed from an external oscillator to OSC1. We would like to use PLL1 to make this our system clock but all documentation (datasheets and example code) we can find seems to be missing some information.

This is based on this comment (in mcg.c KINETIS_120MHZ_SC.zip):

  // Check if OSC1 is being used as a reference PLL for the MCGOUT

  // This requires a more complicated MCG configuration.

  // At this time (Sept 8th 2011) this driver does not support this option

Looking at the datasheets (K10P144M120SF3 and K10P144M120SF3RM) no reference can be found to how to do this.

The state diagram on page 610 in K10P144M120SF3RM suggest it is impossible to enter PEE-mode using OSC1 and PLL1 as MCGCLKOUT.

Is this impossible?

[Hui_Ma]

It need to enable OSC1 by configuring it in the MCG_C10 register – set up the parameters just like OSC0. Then you have to enable it by setting the ERCLKEN bit in the OSC1_CR register.

Once you have the OSC1 enabled, you can then select it as the reference for PLL0 or PLL1. It is tricky if you want to use OSC1 as the reference for the PLL that is providing the system clock in PEE mode. You must first transition from FEI to FBE to PBE before switching from PBE to PEE. You can only be in FBE mode (and PBE) using either OSC0 or the RTC clock as the external clock source. You cannot be in there clock modes with OSC1.

Please check attached example that sets the MCG to run out of the OSC1 in PEE mode as a reference.

Wish it helps.