Not Able to SET the Software Trigger [SWTRIG] Bit in Status and Control Register (PDBx_SC)

[parth_rastogi10]

Hi NXP,

As I am working on a project, so I used the Programmable Delay Block (PDB) module and as a part of the implementation, I am not able to set (to write "1") the Software Trigger [SWTRIG] Bit in Status and Control Register (PDBx_SC) even after I enabled the PDB by writing "1" to PDB Enable Bit (PDBEN) and also selected the Trigger Input Source Select (TRGSEL) as Software trigger which is as mentioned in the RM shown below: 

parth_rastogi10_0-1618837057419.png

Also, please find the below snips of debugging and the function used to set the SWTRIG Bit "set_software_trigger()":

parth_rastogi10_1-1618839182506.png   

parth_rastogi10_2-1618839206732.png

parth_rastogi10_3-1618839282211.png

 Please provide me any inputs on the above issue.

Thanks in advance.

Regards,

Parth

@lukaszadrapa  david tosenovjan 

[mjbcswitzerland]

Hi

It is normal to read '0'

mjbcswitzerland_0-1618844735650.png

It will however have performed the trigger when written with '1'.

Regards

Mark

[parth_rastogi10]

Hi Mark,

Thanks for your reply.

So, even after I wrote "1" to that SWTRIG bit it will not reflect in the register??

Or it is getting automatically cleared to "0" immediately after the resets and restart the counter...?

If it is so, is there any way to verify that the SWTRIG bit is written with "1" and gets cleared immediately?

Regards,

Parth

[mjbcswitzerland]

Hello Parth

It is not possible to read back a '1' - whether it is momentarily set or not is of no significance; the write of '1' is what triggers the event.

You can verify that the event was triggered by the completion of the action that was triggered.

Regards

Mark