Need help with configuring eDMA Software TCD for two-level dma transfer

[wildhorsemusic]

Hi Folks, I am building an application that will use the eDMA in the Kinetis K64F MCU. I need help in setting up the eDMA as a two-level dma transfer.

I am just focused on one TCD for the moment (once I understand the configuration case, I can replicate it in other areas of my code).

1) I am transferring 32bits of data per transfer.

2) The transfer will be triggered by a single software trigger by setting the CR.START to true.

3) Here's a list of software and hardware addresses:

OFFSET	SOURCE		DESTINATION	OFFSET
	0x1FFF1480		0x4004A008
0x4	0x1FFF1484		0x4004A00C	0x4
0x4	0x1FFF1488		0x4004B000	0xFF4
0x4	0x1FFF148C		0x4004B004	0x4
*Note: Source & Destination sizes are 4 bytes (32bits)

3) I believe that the entire transfer will have to be done using minor and major loops, along with minor and major channel linking back to itself in order to trigger the channel requests

4) I know that I can do it by breaking it into two transfers, but I'd rather get a two-level configuration working because it will save me some memory on extra swTCD's.

5) Here's what I think the swTCD should look like:

SADDR =     0x1FFF1480 
SOFF =     0x4 
ATTR =     0x202 
NBYTES =     0x8 
SLAST =     0x0 
DADDR =     0x4004A008 
DOFF =     0xFF4 
CITER =     0x2 
DLAST_SGA = 0x0
CSR =     0x1 
BITER =     0x2 
 
DMA_BWR_CR_CLM(DMA_UNIT, true);
DMA_BWR_CR_EMLM(DMA_UNIT,true);

Am I close?

Thank you very much!

[xiangjun_rong]

Hi, Duane,

You are right, the eDMA can not access the  address in the BitBand area.

BR

XiangJun Rong

[xiangjun_rong]

Hi, Duane,

From your description, it seems that you want to transfer 2  words from the base address 0x1FFF1480 to the destination address 0x4004A008, transfer another two word from base address 0x1FFF1488 to the destination address 0x4004B000. If it is the case, because the destination address is not continuous, as you said that you can use the channel link mode or minor/major loop mode to implement the scheme.

In minor/major loop mode, this is the key register setting:

CR[EMLM] = 1;

DMA_TCDn_NBYTES_MLOFFYES=(1<<30)|(0xff4<<10)|0x02;

SOFF = DOFF=    0x4;

BITER =     0x2 

It is okay, pls have a try.

BR

XiangJun Rong

[wildhorsemusic]

XiangJun Rong,

Can I ask you for assistance on this TCD configuration?

 SADDR  0x1fff14bc 
 SOFF  0x1 
 ATTR  0x0 
 NBYTES  0x14 
 SLAST  0x0 
 DADDR  0x1fff12c0 
 DOFF  0x1 
 CITER  0x1 
 DLAST_SGA 0x1fff1fa0 
 CSR  0x13 
 BITER  0x1 

I am trying to transfer 5 DWORDS from one memory location to another.  However, I keep getting NCE errors.

I have tried configuring it as ATTR = 0202 with SOFF/DOFF = 4, but I keep getting an NCE.

This is really basic stuff, but I seem to be missing something.  By the way what does it mean to have a 0-modulo-address-boundary?

Thanks

Duane

[wildhorsemusic]

XiangJun Rong,

One of the other problems that I keep having is when I write to addresses in the BitBand area.  I get a DBE error, no matter what I do.  After doing some research, I discovered that the eDMA cannot access the BitBand area. While it is described in the K64 Sub-Family Reference Manual, Rev. 2, January 2014, it is not described in the eDMA section.  This is SO FRUSTRATING!  I spent, all this time working on a solution to find that the eDMA won't work in this application.  This kind of critical information should be highlighted in the key areas that apply.

I will have to find a work around.

Thanks for your time.

Duane

[wildhorsemusic]

XiangJun Rong,

I tried the configuration you recommended.  However, I get a DBE (Destination Bus Error) after the 2nd TCD loads (using SGA).  The documentation is not very clear on all the causes for getting a Bus Error.  The eDMA stops with the SADDR = 1FFF14A0 and the DADDR = 43FE0808.  I should have been clear that the destination addresses are peripheral registers and should be written 32bits at a time.  The source addresses are memory addresses where the data and software TCDs are stored. I am pasting the software TCD's that I create based upon your earlier configuration suggestion.  The only thing different in the TCDs are the minor loop offsets and the addresses. 

#1 ga_swtcd_start[0] edma_software_tcd_t {...} 0x1fff1f40
 SADDR uint32_t 0x1fff148c 
 SOFF uint16_t 0x4 
 ATTR uint16_t 0x0 
 NBYTES uint32_t 0x403fd002 
 SLAST uint32_t 0x0 
 DADDR uint32_t 0x4004a008 
 DOFF uint16_t 0x4 
 CITER uint16_t 0x8002 
 DLAST_SGA uint32_t 0x1fff1f60 
 CSR uint16_t 0x11 
 BITER uint16_t 0x8002 
#2 ga_swtcd_start[1] edma_software_tcd_t {...} 0x1fff1f60
 SADDR uint32_t 0x1fff149c 
 SOFF uint16_t 0x4 
 ATTR uint16_t 0x0 
 NBYTES uint32_t 0x4009f002 
 SLAST uint32_t 0x0 
 DADDR uint32_t 0x43fe0808 
 DOFF uint16_t 0x4 
 CITER uint16_t 0x8002 
 DLAST_SGA uint32_t 0x1fff1f80 
 CSR uint16_t 0x11 
 BITER uint16_t 0x8002 
#3 ga_swtcd_start[2] edma_software_tcd_t {...} 0x1fff1f80
 SADDR uint32_t 0x1fff14ac 
 SOFF uint16_t 0x4 
 ATTR uint16_t 0x0 
 NBYTES uint32_t 0x4009f002 
 SLAST uint32_t 0x0 
 DADDR uint32_t 0x43fe1000 
 DOFF uint16_t 0x4 
 CITER uint16_t 0x8002 
 DLAST_SGA uint32_t 0x1fff1fa0 
 CSR uint16_t 0x11 
 BITER uint16_t 0x8002 

My initial configuration was to use a minor loop for the first 2 32bit transfers, then a major loop to offset the destination address for the 2nd set of 32bit transfers, but it doesn't seem to work.

Thanks!  Duane

[wildhorsemusic]

Thank you XiangJun Rong,

I will try it shortly and let you know.

So, I thought that I could use the DOFF value to adjust the destination address once for every BITER?  The documentation does not give many examples that show how to configure a 2-level transfer with channel linking to trigger the subsequent DMA Requests after the initial Software Trigger.  I need to be able to start a whole series of transfers with a single Software Trigger, with Channel Linking and SGA combinations.

Thanks!

Duane