Hi Pau Vilanova,
About the SCB register, you need to find it in the ARM cortexM0+ core document, not the KE04 reference manual.
About the ARM core document, you can go to the ARM official website to find it.
The register code, normally, you can find it in the core_cm0plus.h, I already attach it.
#define SCS_BASE (0xE000E000UL)
#define SysTick_BASE (SCS_BASE + 0x0010UL)
#define NVIC_BASE (SCS_BASE + 0x0100UL)
#define SCB_BASE (SCS_BASE + 0x0D00UL)
#define SCB ((SCB_Type *) SCB_BASE )
#define SysTick ((SysTick_Type *) SysTick_BASE )
#define NVIC ((NVIC_Type *) NVIC_BASE )
#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
#define MPU_BASE (SCS_BASE + 0x0D90UL)
#define MPU ((MPU_Type *) MPU_BASE )
#endif
The stop mode code is:
void stop (void)
{
SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
#ifndef KEIL
asm("WFI");
#else
__wfi();
#endif
}
*****************************************************************************/
void PMC_SetMode(PMC_Type *pPMC,uint8_t u8PmcMode)
{
switch(u8PmcMode & 0x3)
{
case PmcModeRun:
break;
case PmcModeWait:
wait();
break;
case PmcModeStop4:
pPMC->SPMSC1 |= (PMC_SPMSC1_LVDE_MASK | PMC_SPMSC1_LVDSE_MASK);
stop();
break;
case PmcModeStop3:
pPMC->SPMSC1 &= ~(PMC_SPMSC1_LVDE_MASK | PMC_SPMSC1_LVDRE_MASK | PMC_SPMSC1_LVDSE_MASK);
stop();
break;
default:
break;
}
}
You can add the baremetal code to your MCUXpresso project.
About the interrupt, it is totally determined by your own app code, if you enable the interrupt, when the interrupt happens, the STOP mode will be exit, you can your RTC code, whether enable the RTC interrupt or not.
The KE04 PMC sample code, you also can refer to the offical code, but it is the IAR and MDK project.
https://www.nxp.com/webapp/Download?colCode=FRDM-KEXX-Driver-Library-Package&appType=license
Wish it helps you!
Have a great day,
Kerry
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