MKE04Z128 SPI no output

[shoaibshaikh]

Hi everyone,

I am facing problems in implementing the SPI module in MKE04Z128VLK4 chip. I initialzed the chip for the following conditions.

/*
        * masterConfig->enableStopInWaitMode = false;
        * masterConfig->polarity = kSPI_ClockPolarityActiveHigh;
        * masterConfig->phase = kSPI_ClockPhaseFirstEdge;
        * masterConfig->direction = kSPI_LsbFirst ;
        * masterConfig->dataMode = kSPI_8BitMode;
        * masterConfig->txWatermark = kSPI_TxFifoOneHalfEmpty;
        * masterConfig->rxWatermark = kSPI_RxFifoOneHalfFull;
        * masterConfig->pinMode = kSPI_PinModeOutput;
        * masterConfig->outputMode = kSPI_SlaveSelectAutomaticOutput;
        * masterConfig->baudRate_Bps = 500000U;
        */

The regsiter values are C1 = 0xF3, C2 = 0x19, BR = 0x00;

Chip select pin is high after initializing SPI but does not go low after data is moved to Data register.

The code is entering the ISR but I do not see any output on the pins of CLK or MOSI.

I am also multiplexing the SPI pins initially. I attached my full project.

Thanks,

[Robin_Shen]

Hi Shoaib Shaikh,

I try to flash your code into FRDM-KE06Z board.
I do see output on the pins of PTG4(CLK) and PTG5(MOSI).
Due to the PTG5~PTG7 are connect to LEDs, so I only connect the PTG4(CLK) and PTG5(MOSI) and GND to logic analyzer.
I think you may need to check the hardware connection.

Best Regards,

Robin

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[shoaibshaikh]

Hi Robin,

I was not able to see MOSI or clock cycles on the oscilloscope but after changing the buffer size 

(bytes of data i’m transferring) values, I can see some signals on it.

1) I see different signals on the oscilloscope if I debug with breakpoint on the SPI_WriteData() function as compared to debug without any breakpoints.

2) Another problem is that, I am seeing less clock and MOSI cycles than expected.(debugging without breakpoints)

for small buffer size (2) I see only one low to high on MOSI and one clock (Yellow - clock, blue - MOSI)

for a large buffer size (100) I see 22 clock cycles as shown below

Shouldnt there be much more MOSI and CLK waveforms as I am transferring 100 bytes of data?

In the above case I kept a fixed baudrate of (baudRate_Bps = 5000U)

but if I increase it to baudRate_Bps = 500000U, I dont get any clock and a low to high transition on MOSI

Could you let me know about these points.

Thanks,

[shoaibshaikh]

Hi Robin,

Thanks for your reply.

I tried the same code on another PCB having just the chip but the result was the same.

Could you kindly check the code on MKE04Z128VLK4 chip.