MK64 FlexBus FB_RW

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DINGii
Contributor II

I'm using MK64, the FB_RW keeps being low after the write operation is finished, and the FB_RW returns high after the read operation, which seems to be 6800 mode, I need 8080 mode

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DINGii
Contributor II

DINGii_0-1717192583689.png

The DM9000 write timing is shown in the figure, how does the MK64 FlexBUS implement it?

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DINGii
Contributor II

DINGii_0-1717192140252.png

As you can see from the graph, the FB_RW stays low after the data is written

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

From the attached  FlexBus timing, it is incorrect, at least, the data bus should be valid until the rising edge of /CS signal.

Pls try different parameter in the FB_CSCRn register, especially, WRAH and WS bits, do not use burst mode, set AA bit in 1.

Pls have  a try.

BR

XiangJun Rong

 

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

The Flex_Bus of K64 is in 8086 mode instead of 68K mode.

This is the reading timing:

xiangjun_rong_0-1717141109471.png

This is writing timing:

xiangjun_rong_1-1717141202761.png

Compare the two timing, you can see that the /FB_OE  low and the FB_RW high are observed in reading timing, the /FB_OE  high and the FB_RW low are observed in writing timing.

If the timing is 68K mode, the /FB_OE is always low no matter whether it is reading or writing.

Hope it can help you

BR

XiangJun Rong

 

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DINGii
Contributor II

DINGii_0-1717192583689.png

The DM9000 write timing is shown in the figure, how does the MK64 FlexBUS implement it?

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