MK26 SPI2 data transfer issues

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MK26 SPI2 data transfer issues

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1,206 Views
pascalschröer
Contributor V

Hi to all,

I try to send a few bytes (up to 4) via SPI interface to an external flash. I have already worked with Kinetis' SPI interface without any troubles. Right now, I'm working with a Kinetis MK26 device. The problem is:

I'm not able to send more than 2 bytes in a row (without a CS toggle). The transfer is interrupted after 2 Bytes, irrespective of what I'm doing!

0. General instructions:

All port, clock and NVIC configurations are finished and work!

1. Initialisation:

void SPI2_init(void)  {

     /* Enable SPI2 interface master mode and set CS0 inactive high */

     SPI2_MCR = 0x00

                        | SPI_MCR_MSTR_MASK

                        | SPI_MCR_PCSIS(0x01);

      /* Set baud rate / frame size is 8 bit for CS 0 */

      SPI2_CTAR0 = 0x00

                             | SPI_CTAR_FMSZ(0x07)

                             | SPI_CTAR_BR(0x06);

 

      /* Enable end of queue interrupt */

      SPI2_RSER |= SPI_RSER_EOQF_RE_MASK;

}

2. Send data:

void SPI2_send(void)  {

      /* Clear transmit FIFO full flag */

      SPI2_SR |= SPI_SR_TFFF_MASK;

      /* Wait for FIFO space */

      while(!(SPI2_SR & SPI_SR_TFFF_MASK));

      /* Send first 8 bytes and DON'T let the CS0 go back to inactive state! */

      SPI2_PUSHR = 0x00

                             | SPI_PUSHR_TXDATA(0x33)         

                             | SPI_PUSHR_PCS(1)              

                             | SPI_PUSHR_CTAS(0)

                             | SPI_PUSHR_CONT_MASK;

      /* Send second 8 bytes and DON'T let the CS0 go back to inactive state! */

      SPI2_PUSHR = 0x00

                             | SPI_PUSHR_TXDATA(0x66)         

                             | SPI_PUSHR_PCS(1)    //CS0          

                             | SPI_PUSHR_CTAS(0)

                             | SPI_PUSHR_CONT_MASK;

      /* Send last 8 bytes and LET the CS0 go back to inactive state! */

      SPI2_PUSHR = 0x00

                             | SPI_PUSHR_TXDATA(0x99)         

                             | SPI_PUSHR_PCS(1)   //CS0           

                             | SPI_PUSHR_CTAS(0)

                             | SPI_PUSHR_EOQ_MASK;  //generate end of queue interrupt

}

3. Receive / interpret data:

void SPI2_isr(void)  {

      /* dummy variable */

      uint32_t tmp = 0;

       /* Get the SPI FIFO values */

       tmp |= SPI2_POPR << 14;

       tmp |= SPI2_POPR << 6;

       tmp |= SPI2_POPR >> 2;

      /* Clear receive and transmit FIFO */

      SPI2_MCR |= SPI_MCR_CLR_RXF_MASK;

      SPI2_MCR |= SPI_MCR_CLR_TXF_MASK;

      /* Clear end of queue flag! */

      SPI2_SR |= SPI_SR_EOQF_MASK;

}

4. Function call:

void main(void)  {

      ... //Init all the rest

      /* Init SPI2 interface */

      SPI2_init();

    

      for(;;)  {

            delay_ms(10);

            SPI2_send();

      }

}

5. Result:

The result is, that I just transfer the first two bytes! Btw. I mentioned, that the SPI2_isr() is called twice after the function call of SPI2_send()...

Thanks for your help!

Pascal

1 Solution
872 Views
xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi, Pascal,

Frankly speaking, I am not clear about your question, do you mean that the SPI just transfers two bytes even if you write 4 bytes? I suspect that the FIFO save the bytes but not send out.

I suggest you disable FIFO mode by setting the DIS_TXF and DIS_RXF bits in SPIx_MCR, and suggest you  set the TCF_RE to enable interrupt when the byte has been transferred.

Hope it can help you.

BR

XiangJun Rong

View solution in original post

2 Replies
873 Views
xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi, Pascal,

Frankly speaking, I am not clear about your question, do you mean that the SPI just transfers two bytes even if you write 4 bytes? I suspect that the FIFO save the bytes but not send out.

I suggest you disable FIFO mode by setting the DIS_TXF and DIS_RXF bits in SPIx_MCR, and suggest you  set the TCF_RE to enable interrupt when the byte has been transferred.

Hope it can help you.

BR

XiangJun Rong

872 Views
pascalschröer
Contributor V

Hi xiangjun,

thanks for your answer! You are completely right with your suggestion of the fault. I just transfer two bytes even if I write 4 bytes. The solution is to DISABLE the FIFO by setting DIS_TXF and DIS_RXF. To generate the interrupt I use the TCIF.

Thanks!

Pascal

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