MK22FN512VLH12 crystalless clock configuration with Zephyr

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MK22FN512VLH12 crystalless clock configuration with Zephyr

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laszlomonda
Contributor V

I can build the blinky example Zephyr application, flash it to the FRDM-K22F dev board, and it works fine.

However, when flashing the blinky application on our custom board (with a modified LED GPIO according to our schematic), it doesn't blink its LED, and debugging it revealed that it stops upon configuring the clock. It's not surprising since our custom board doesn't have a crystal, unlike the FRDM-K22F board.

Before starting to use Zephyr, we've been using a bare metal firmware, and you can see its clock configuration code. I tried to replicate this clock configuration with Zephyr but couldn't so far.

In Kconfig, I set:

CONFIG_SOC_SERIES_KINETIS_K2X=y

As for the devicetree, I found the relevant bindings, and set the following based on our bare metal firmware:

 

 

 

&sim {
    pllfll-select = <KINETIS_SIM_PLLFLLSEL_MCGPLLCLK>;
    er32k-select = <KINETIS_SIM_ER32KSEL_OSC32KCLK>;
};

 

 

 

I was advised to modify the clock_init() used by the K22F device. I've been trying to figure out how to modify this function but couldn't, so I could use some help.

Ideally, one shouldn't fork the entire repo and modify this function but configure the clock via the devicetree, the board file, or some native mechanism supported by Zephyr.

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RaRo
NXP TechSupport
NXP TechSupport

Hello @laszlomonda,

As mentioned in the soc.c file's fsl_fdrm_k22f_init(void), the PLL/System clock is supposed to be set to 120MHz. To change this, please search for static const osc_config_t oscConfig  and change the .freq value.

Next, we share with you how to setup clock using driver functions from clock_config.c file's FDRM-K22 SDK.

/* How to setup clock using clock driver functions:

 * 1. CLOCK_SetSimSafeDivs, to make sure core clock, bus clock, flexbus clock and flash clock are in allowed range during clock mode switch.
 
 *
 
 * 2. Call CLOCK_Osc0Init to setup OSC clock, if it is used in target mode.

 *

 * 3. Set MCG configuration, MCG includes three parts: FLL clock, PLL clock and internal reference clock(MCGIRCLK). Follow the steps to setup:

 * 1). Call CLOCK_BootToXxxMode to set MCG to target mode.

 * 2). If target mode is FBI/BLPI/PBI mode, the MCGIRCLK has been configured

 * correctly. For other modes, need to call CLOCK_SetInternalRefClkConfig

 * explicitly to setup MCGIRCLK.

 * 3). Don't need to configure FLL explicitly, because if target mode is FLL

 * mode, then FLL has been configured by the function CLOCK_BootToXxxMode,

 * if the target mode is not FLL mode, the FLL is disabled.

 * 4). If target mode is PEE/PBE/PEI/PBI mode, then the related PLL has been

 * setup by CLOCK_BootToXxxMode. In FBE/FBI/FEE/FBE mode, the PLL could

 * be enabled independently, call CLOCK_EnablePll0 explicitly in this case."

 *

 * 4. Call CLOCK_SetSimConfig to set the clock configuration in SIM.

 */

Kind regards, Raul.

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