MCG specifications about "Δfdco_t"

[okubohitoshi]

I am using a MK20FN1M0VLQ12 device.

I have the following questions:

In K20 Sub-Family　Datasheet「Document Number K20P144M120SF3　Rev 5, 10/2013」

Q1.[6.3.1 MCG specifications Table 15. MCG specifications]

"Δfdco_t" is "typ ±4.5%fdco".

I understand that this spec is when using the (slow clock) internal reference.

Do I understand correctly?

Q2.about "Δfdco_t".

I want to use MCG in FLL mode using External clock from RTC OSC(32.768kHz ±20ppm).

Target DCO output frequency is 47.97MHz.

Other setting is below.

DMX32:1

DRST_DRS:01

In that case,

Do you tell me the spec of "Δfdco_t" ?

Thank you and Best regards.

[Jorge_Gonzalez · Accepted solution]

Hello Okubo:

About your questions:

Q1: Your understanding is correct, the tests were made with the slow internal reference clock (32 kHz)

Q2: I assume that these tests are not made due to all the external factors that can affect the accuracy. So there is no information about this. However, I think the tolerance should be similar to Δfdco_t, as you would use the same frequency with the RTC (32 kHz).

Hope my reply is useful.

Regards!

Jorge Gonzalez