I found the following:
Chapter 33
Low-Power Timer (LPTMR)
33.1 Introduction
NOTE
For the chip-specific implementation details of this module's
instances, see the chip configuration information.
The low-power timer (LPTMR) can be configured to operate as a time counter with
optional prescaler, or as a pulse counter with optional glitch filter, across all power
modes, including the low-leakage modes. It can also continue operating through most
system reset events, allowing it to be used as a time of day counter.
33.1.1 Features
The features of the LPTMR module include:
• 16-bit time counter or pulse counter with compare
• Optional interrupt can generate asynchronous wakeup from any low-power mode
• Hardware trigger output
• Counter supports free-running mode or reset on compare
• Configurable clock source for prescaler/glitch filter
• Configurable input source for pulse counter
• Rising-edge or falling-edge
33.1.2 Modes of operation
The following table describes the operation of the LPTMR module in various modes.
KL36 Sub-Family Reference Manual, Rev. 3, July 2013
I could not a reference (or at least what I found did not indicate this register) to this register. What I read seems to indicate that it will do what I wish, in that the unit can go into a low power state and wake up on a timer and then be put back into a low power state. Just need to find out how to do this. I hope that you or someone can help me with this.