Last ISR Vector in MEK18 Startup s file

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Last ISR Vector in MEK18 Startup s file

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sean_dvorscak
Contributor III

I was looking through the startup_MKE18F16.s file, and had a question about what the 255th entry in the vector table.

The last entry shows a value of: DCD 0xFFFFFFFF ; Reserved for user TRIM value

I cannot find any information on what this TRIM value is.  Can someone either tell me what this is or point me to some documentation for this?

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Miguel04
NXP TechSupport
NXP TechSupport

Hi @sean_dvorscak 

A trim value is a reference value stored in the non-volatile memory which is used by the mcu to initialize and calibrate (in this case) the clock once it occurs a power-cycle, this values allow the frequency to be almost constant during the mcu operation. This post could give you a better idea of what trimming is.

Let me know if you have another question.

Best Regards, Miguel.

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sean_dvorscak
Contributor III

Hi @Miguel04

So this is the trim value for the internal oscillator?  Is that part of the "High Range OSC" shown in figure 18-1 of the reference manual?

NXP_Question.PNG

Would like to know more about what clock(s) exactly are affected by this and how exactly the trim value configures the clock?  Something like a formula.

Thanks for the help.

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Miguel04
NXP TechSupport
NXP TechSupport

Hi @sean_dvorscak 

I've been looking for the information.

Every main clock of the SCG needs to be trimmed, and there isn't a specific formula for the clock to be trimmed, instead there is a register (for example SCG_FIRCSTAT) which coursely trim the Fast IRC Clock to within approximately ±0.7% of the target
frequency. Chapter 19.3.18 reference manual.

Sorry for the late reply, let me know if you have another question.

Best Regards, Miguel.

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