Kinetis, PIT gated transfert activation

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

Kinetis, PIT gated transfert activation

358 Views
tatalifaku
Contributor I

Hello,

I am using a MK66FX1M0VMD18 and I am trying to perform DMA transfer using PIT gated transfer activation but I found no answer anywhere to my question.

My DMA transfers work perfectly when I use PIT-only activation. It also works when using FTM channel only.

According to Kinetis Quick Reference User Guide (Rev 3), 7.1.2.2 trigger mode, figure 7.4, In PIT gated mode, channel is activated only if both PIT trigger and Peripherial Request are HIGH.

In my case, I use a PIT triggering at ~20MHz and a FTM channel running at 31Khz with a PWM duty of 87%. With this configuration, PIT signal goes HIGH multiple times during one FTM channel signal HIGH. I expected to obtain multiple channel activations, roughly 87% of 20,000,000 PIT triggers followed by 13% without any trigger.

My problem is it is not what I obtained. I obtain a transfer running at the same speed as the FTM channel (31KHz). I assumed a logical AND between PIT signal and Peripherial request signal due to Pit-only transfer activation figure but I may be wrong. It is like the channel cannot be re-activated until both signals goes LOW.

My question is simple. In PIT gated transfer activation mode, if the PIT trigger signal  goes HIGH 2 times and Peripherial Request signal is HIGH during these 2 times (without ever going LOW), is the channel activated 1 or 2 times ?

Thanks,

Labels (1)
0 Kudos
1 Reply

270 Views
xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi, Tatali,

Can you consider using Kinetis KV family for example KV4x or KV5x? The KV4x and KV5x has AOI module and crossbar module, you can connect the FTM_CHx signal to one XB_INx pin and use AOI module to do AND logicof PIT signal and FTM_CHx signal, then use the AOI output signal to trigger DMA, it is easy.

BR

Xiangjun Rong

0 Kudos