Kinetis MKV58F1M0VLQ24 UART0 TX DMA

[thieulam]

Hello everybody.
I am trying to initialize the uart0 tx DMA module on the kinetis MKV58F1M0VLQ24.
I can make everything work up to a maximum of 8 characters,
if I try to make a 16-character dma tx, 8 always come out of the serial. Can you help me? Here is my code:

uint8_t str[32]={'X','2','3','4','5','6','7','Y','K','2','3','4','5','6','7','W','&','%','$'};

int init_my_dma(void)
{
//disable request channels
DMA0->TCD[0].CSR &= ~DMA_CSR_ACTIVE_MASK;
DMA0->ERQ = 0U;
DMA0->EEI = 0U;
DMA0->SEEI = 0U;

//set source addr
DMA0->TCD[0].SADDR = (__IO uint32_t)str;
DMA0->TCD[0].NBYTES_MLNO = DMA_NBYTES_MLNO_NBYTES(16) ;
DMA0->TCD[0].NBYTES_MLOFFNO=16;
DMA0->TCD[0].NBYTES_MLOFFYES=16;
DMA0->TCD[0].ATTR = DMA_ATTR_SSIZE(0) | DMA_ATTR_DSIZE(0); //8-bit transfer
DMA0->TCD[0].DADDR = (__IO uint32_t)&UART0_PERIPHERAL->D;

// Adjustment value used to restore the source and destiny address to the initial value
DMA0->TCD[0].SLAST = -16;//(-1 * size_of_tx); // Source address adjustment
DMA0->TCD[0].DLAST_SGA = 0;//(-1); // Destination address adjustment
// Set an offset for source and destination address
DMA0->TCD[0].SOFF = 1; // Source address offset
DMA0->TCD[0].DOFF = 0; // Destination address offset

// Current major iteration count (a single iteration of 'size_of_tx' bytes)
DMA0->TCD[0].CITER_ELINKNO = 1;
DMA0->TCD[0].BITER_ELINKNO = 1;

DMA0->CERR = DMA_CERR_CAEI_MASK;

DMA0->TCD[0].CSR |= DMA_CSR_ACTIVE_MASK;

DMA0->CERQ = DMA_CERQ_CAER_MASK;

DMA0->TCD[0].CSR |= DMA_CSR_START_MASK;

//wait for DMA to complete

while(!(DMA0->TCD[0].CSR & DMA_CSR_DONE_MASK)); //DMA_CSR_DREQ_MASK
return 0;
}

[thieulam · Accepted solution]

OK SOLVED!

After days of test now i can transfer over DMA 32 bytes on UART0 tx.

Now i must work for UART0 rx dma..

The UART0 is pre-configured before, with standard fsl_uart.c (mcuxpresso)

The code:

/*******************************************************************************
* Definitions
******************************************************************************/
uint8_t str[32]={'X','2','3','4','5','6','7','Y','K','2','3','4','5','6','7','W',\
'?','2','3','4','5','6','7','$','%','2','3','4','5','6','7','&'};
/*******************************************************************************
* Prototypes
******************************************************************************/

/*******************************************************************************
* Code
******************************************************************************/
/*!
* @brief Main function
*/
int init_my_dma(void)
{ // Enable DMA clocks

SIM->SCGC6 |= SIM_SCGC6_DMAMUX_MASK;
SIM->SCGC7 |= SIM_SCGC7_DMA_MASK;

UART0->C5|=0b10000000;
UART0->C2|=0b10000000;
// Configure TX DMA
DMAMUX->CHCFG[0] &= ~(DMAMUX_CHCFG_ENBL_MASK);
DMAMUX->CHCFG[0] = DMAMUX_CHCFG_SOURCE(3);

DMA0->TCD[0].BITER_ELINKNO = 32;
DMA0->TCD[0].CITER_ELINKNO = 32;
DMA0->TCD[0].SADDR = (__IO uint32_t)str;
DMA0->TCD[0].ATTR = DMA_ATTR_SMOD(0) | DMA_ATTR_SSIZE(0) | DMA_ATTR_DMOD(0) | DMA_ATTR_DSIZE(0);
DMA0->TCD[0].SOFF = 1;
DMA0->TCD[0].NBYTES_MLNO = DMA_NBYTES_MLNO_NBYTES(1);
DMA0->TCD[0].SLAST = -32;
DMA0->TCD[0].DADDR =(__IO uint32_t) &UART0->D;
DMA0->TCD[0].DOFF = 0;
DMA0->TCD[0].DLAST_SGA = 0;
DMA0->ERQ &= ~DMA_ERQ_ERQ0_MASK;
DMAMUX->CHCFG[0] |= DMAMUX_CHCFG_ENBL_MASK;
NVIC_EnableIRQ(IRQ_DMA0_IRQN);

DMA0->TCD[0].CSR |= DMA_CSR_DREQ_MASK | DMA_CSR_DONE_MASK | DMA_CSR_INTMAJOR_MASK;
DMA0->ERQ |= DMA_ERQ_ERQ0_MASK; //this line start the dma transfert

return 0;
}