Kinetis K8x MPU and Supervisor/User Modes

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Kinetis K8x MPU and Supervisor/User Modes

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muratcakmak
Contributor II

I am trying to understand MPU on K8x family. This family does not include a Cortex M4 MPU, instead, it has Kinetis specific MPU.

In the Kinetis K82 Sub-Family Reference Manual,

3.1.5 Core privilege levels
The ARM documentation uses different terms than this document to distinguish between privilege levels.
If you see this term... it also means this term...

  • Privileged -> Supervisor
  • Unprivileged or user -> User

Now, Great but when I look at the MPU example in Kinetis SDK v2.1 for FRDM-82F, I cannot see that relation.

As you know, region 0 gives access to User mode for all device at startup.

In the example,  a different region is also set to limit user access to a specific region.

First, application is able to write the sepecific region and execution is in Privileged Mode.

And then example removes rights from Region 0 (which gives access to user mode for all device) using MPU_SetRegionRwxMasterAccessRights() function.

After that when example tries to access same region again, it gets "Bus Fault".

Problem is that execution still in Privileged Mode and no operation to pass Unprivileged mode during example.

Example just changes regions access but execution is always in privileged mode and SuperVisor (privileged) mode has rights to access to this region but getting Bus Fault.

Am I missing something?

Only I need, differentiate memory access with ARM Cortex Privileged/Unprivileged Modes.

3 Replies

84 Views
Hui_Ma
NXP TechSupport
NXP TechSupport

Hi

Customer could check below MPU register value during KSDK MPU demo execution:

pastedImage_1.png

The demo set the SRAM range [0x1FFF0020~0x1FFF007F] with supervisor mode read and execute allowed, but no write and user mode R/W/X no permitted.

That's why when the code want to write new value to related SRAM range will generate the bus fault.

        /* Cannot write here, bus fault occur. */
        regionArray[g_count] = g_count;

The regionArray[] located at above SRAM range as below variable window shows:

pastedImage_2.png


Wish it helps.

Have a great day,
Ma Hui
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84 Views
muratcakmak
Contributor II

Thanks Ma Hui but my question was "What does SuperVisor/User Mode mean?" from the Kinetis Specific MPU side?

SuperVisor ?= ARM Cortex M Privileged

User Mode ?= ARM Cortex M Unprivileged

It is true, SRAM range [0x1FFF0020~0x1FFF007F]  is set with SuperVisor mode but if SuperVisor means ARM Privileged mode, BUS Fault should not be rised because all example runs with ARM Privileged (SuperVisor) Mode.

I would expect to see BUS Fault when we pass to ARM Unprivileged mode and after trying to access Supervisor SRAM Range. 

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Hui_Ma
NXP TechSupport
NXP TechSupport

Hi Murat,

The MPU module in K8x product with below relationship with ARM Cortex M4 core:

SuperVisor = ARM Cortex M Privileged

User Mode = ARM Cortex M Unprivileged

For the MPU demo code located in Flash memory, that doesn't affect the code execution whatever ARM Cortex M4 core in Privileged mode or Unprivileged mode.

The demo shows the SRAM range was protected only with supervisor mode read and execute allowed, the user mode without read/write/execute right.

That SRAM range doesn't writable even core in privileged mode (supervisor mode), for the MPU_RGD2_WORD2 [M0SM] bits is 0b01:

pastedImage_1.png

The bus fault will happen, for there with operation to write new value to protected SRAM range.

 
Wish it helps.

Have a great day,
Ma Hui
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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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