Kinetis K8x MPU Region 0

[EugeneHiihtaja]

Hello !

I can see MPU of K82 is enabled from boot time and Region 0 is provisioned with magic values what should exists

if JTAG type of debug is expected.

But how-to disable this region properly ?

Could I just write 0x00000000 to all 4 dwords what represens this region

or I should disable MPU , update region 0 values and enable MPU back if it in use ?

Please suggest right sequence.

Regards,

Eugene

[EugeneHiihtaja · Accepted solution]

Hi Jing Pan !

Thank you ! I will execute more testing . But I think PPB should be accesible in priveledged mode.

So wode access dosn't have sense for UserMode.

I forgot one more detail.

Should I enable Write buffer back when configure MPU completely and enable it ?

Or it is reactivated automatically ?

Regards,

Eugene

[jingpan]

Hi,

yes, it is available to enable write buffer MPU setting.

Regards,

Jing

[EugeneHiihtaja]

Hi Jing Pan !

When I switch to UserMode, I can't even read MMCAU address range 0xE0081000..1FFF.

MPU covers this area for UserMode, but looks like it dosn't have sense, becouse this range is out of it.

But how I can get access to MMCAU in UserMode ? AIPS table is also dosn't have entry for it.

Regards,

Eugene

[jingpan]

Hi Eugene,

First I must apologize that peripheral space(from 0x40000000) is not protected by MPU.

MPU is also not cover PPB(from 0xe0000000). Unprivileged access to the PPB causes BusFault errors unless otherwise stated. Notable exceptions are:

• Unprivileged accesses can be enabled to the Software Trigger Interrupt Register in the System Control Space by programming a control bit in the Configuration Control Register.
• For debug related resources.

Please download DDI0403D_arm_architecture_v7m_reference_manual.pdf from ARM website and check it at B3-707.

So your report is not a bug of ARM cortex-M4 or program error. It is just a feature of CORTEX-M4.

Regard,

Jing

[EugeneHiihtaja]

Hi Jing Pan !

And peripheral space is defined as range 0x40000000 - 0xFFFFFFFF. Or what is K82 specific meaning ?

Regards,

Eugene

[jingpan]

Hi,

no, 0xe0000000~0xffffffff is not included. This area is system segment for the PPB and vendor system peripherals. It's ARM private address.

Regards,

Jing

[EugeneHiihtaja]

Hi Jing !

I can see differences between MPUs and try to get all details. 

I mean what exact "memory" address space is controlled by K82 specific MPU ?

Only 256KB of ROM and SRAM_UPPER & LOW areas or someting else as well ?

Or something after 0x40000000 address. Or peripherals controlled via AIPS blocks.

And PIB block is always accessible only in Supervisor mode ?

Regards,

Eugene

[jingpan]

Hi,

The address range is not only SRAM. There is a K82 block diagram in page 32. It shows all the address it can protect, inluce SRAM, QSPI, BOOT ROM and Flash, SDRAM, Fexbus. The peripheral space is not showed in this picture. But in 23.7, you can see that peripheral address is also include.

Regards,

Jing

[EugeneHiihtaja]

Hi !

Yes,

I think after configuration of 1-5 static regions and enabling of MPU back, I should disable Reqion 0 for all masters ( Debug master 1 remains).

/* Disable MPU. */
SYSMPU->CESR &= ~SYSMPU_CESR_VLD_MASK;

/* SYSMPU Initialisation & Enable. */
SYSMPU_Init(SYSMPU, &userConfig1);

/* Make sure that all the registers are set before proceeding. */
__DSB();
__ISB();

...

/* Invalidate Region 0 for Master 0, remove background region with wide access right. */
#if 0
master0 = prvComposeRegionRightMPU(kSYSMPU_SupervisorEqualToUsermode, kSYSMPU_UserNoAccessRights);
SYSMPU_SetRegionRwxMasterAccessRights(SYSMPU, 0, 0, &master0);
#endif

Can I do this on fly or what is the best way ?

For what reason WriteBuffer should be disabled before MPU configuration ?

So I'm really interesting about right sequence for init MPU ( reinit) what I can use in prvSetupMPU(void) function.

By default MPU is enabled and it might have some effect for right sequence for disable it, reconfigure and remove Region0 with super wide accesses for Core.

By the way, looks like in User Mode, I can get read/write access to simple peripheral areas (LPUART0 for example.).

Even this address area is configured in MPU with rights kSYSMPU_SupervisorEqualToUsermode + kSYSMPU_UserReadWrite).

Is this generic feature of K82 ( in ARM it might be possible) or some other way should be used for access

LPUART area from User like task ?

Regards,

Eugene

[jingpan]

Hi,

So I think you can disable whole MPU first, or you can just do as the SDK example.(FRDM-K82F\boards\frdmk82f\driver_examples\sysmpu)
Write buffer is a pipeline stage for buffering write data to prevent bus stalls from stalling the processor. Disables write buffer use during default memory map accesses. This causes all bus faults to be precise.
I'm sorry I can get your meaning of the last question. The MPU module is a special design in Kinetis MCU. It is different with ARM's official MPU. Their address is different. Kinetis MPU address is from 0x4000d000. But ARM's MPU is from 0xe000ed90.

Regards,

Jing

[jingpan]

Hi,

Do you use the FreeRTOS in K82 SDK?

Regards,

Jing