Kinetis K61 DDR_CKE pull-down

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Kinetis K61 DDR_CKE pull-down

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panin
Contributor I

Hello everyone!

Consider the following scenario:

  • ...
  • Application code is executed from the lower half of the DDR2 memory.
  • At some point in-application programming is executed and a new application is loaded into the upper half of the DDR2 memory.
  • DDR2 memory is put into the self refresh mode and MCU is reset (reset is needed to initialize the core and the used peripherals to a known state).
  • DDR2 controller is initialized and control is passed to the application in the upper half of the DDR2 memory.
  • ...

Is the external pull-down resistor on the DDR_CKE necessary to keep the DDR2 memory in self-refresh mode in this case after MCU is reset? What might happen if there is no pull-down?

In case it matters MCU is MK61FX512VMJ12 and DDR2 memory is MT47H128M16RT-25E-IT.

Best regards,

Yuri Panin

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1 Solution
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jingpan
NXP TechSupport
NXP TechSupport

Hi Yuri,

Yes, I think an external 10k pull-down resistor is needed. The DDR_CKE pin of K61's default state is DISABLED. That is a high-impedance state. The TWR-K70 board also has this pull-down resistor.

Regards,

Jing

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jingpan
NXP TechSupport
NXP TechSupport

Hi Yuri,

Yes, I think an external 10k pull-down resistor is needed. The DDR_CKE pin of K61's default state is DISABLED. That is a high-impedance state. The TWR-K70 board also has this pull-down resistor.

Regards,

Jing

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panin
Contributor I

Just as I suspected. Thank you very much, Jing!

Best regards,

Yuri Panin

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