I'm using the Simulink Toolbox for Model-Based Design with KV4x but now there is a question which is placed here better.
As I asked here https://community.nxp.com/thread/469445#comment-993599 I want to know if it is possible to trigger the ADC at different times over one pwm period with KV4x.
I found out that with an additional pre-Trigger in the PDB_Config block the End of Scan Interrupt occures two times, so with every pre Trigger all configured samples are read. This is not what I want !
So in simultaneous mode the both converters adca and adcb should read one specific sample pair with each trigger but not directly after each other.
Trigger0 - ADCA: I_phA ; ADCB: I_phB
Trigger1 - ADCA: U_dcb ; ADCB: I Temp
I see your concern, you want to sample the phase current simultaneouly for the two phase current channels, i think it is okay, but your hardware circuit has to meet the requirement.
As you know that the KV4x has only ONE ADC module, which has two ADC converter:ADCA and ADCB, in parallel mode with SIMULT bit set, the ADCA and ADCB sample simultaneously with sample0/sample8, sample1/sample9, sample2/sample10......, in the mode, you have to install one phase current channel to sample0, another phase current channe to sample8 so that the two phase current can be sampled simultaneously. The ADCA_CHx physical channel can be mapped to only sample0~7, ADCB_CHx physical channel can be mapped to only sample8~15, which phase current channel should be sampled is dependent on the motor voltage sector, in other words, you have to connect one phase current channel to both ADCA_CHx and ADCB_CHx, it is required from hardware perspective.
I_phC------------------>ADCA_CH1 and ADCB_CH1
if you sample I_phA/I_phB, ADCA_CH0 to sample, ADCB_CH0 to sample.
if you sample I_phA/I_phC, ADCA_CH0 to sample, ADCB_CH1 to sample.
if you sample I_phB/I_phC, ADCA_CH1 to sample, ADCB_CH0 to sample.
for the other parameter for example DC bus voltage, DC bus current, temperature..., you can use scan mode and mapped them to the other any channels, it is okay.
Regarding the trigger signal, I think it is not a problem, you can use FTM itself which generate 6 PWM signal or PDB to trigger ADC. In parallel scan mode, only one trigger event is required in one PWM cycle, for FTM, you use complementary mode of PWM to control PMSM, in the case, the odd FTM channel is not used, you can use the odd FTM channel to trigger ADC. For example, you can set the CH1TRIG bit in FTM0_EXTTRIG so that FTM0_CH1 can trigger ADC, you can set the FTM0_C1V to set the triggering point. from motor theory, the sampling point is in the middle of High logic of bottom PWM signal, you can set the FTM0_C1V based on above condition. If you use PDB to trigger ADC, it is okay.
Hope it can help you
thank you for your reply !
My Problem is not to measure the currents in simultaneous mode. That works !
I want to trigger the ADC at two different times over one pwm period.
At the Moment I use the PDB0 block to Trigger the adc, which you can see here:
First of all the three PWM low side igbt signals:
I have set the Initialization Trigger in the external Trigger tab of "FTM Three Phase Output", which should be exactly in the middle of PWM low side Signal.
In the PDB config block I have configured "FTM0 Init and Channel Match"
Modulus: 120MHz / 10kHz = 12000
I only have configured one Pre-Trigger in the Channel 0 configuration without any delay.
All configured samples are read in this Moment.
My goal is now to seperate the adc reading.
But If I activate the "Pre-Trigger 1 Enabled" Option all configured samples are read two times in one pwm cycle.
This leads to Problems because maybe the low side igt is not in conduction for the second measurement.
It should be for example:
PreTrigger0 - ADCA: I_phA ; ADCB: I_phB with delay 0
PreTrigger1 - ADCA: U_dcb ; ADCB: I Temp with delay 1450 (which is not activated yet)
The ADC(in simultaneous mode) is triggered from the PDB0
scan mode: Triggered Parallel
maybe the scan mode is not suitable for my Problem ?
I see your issue.
First of all, pls set the bit0/bit1 and bit8/bit9 for the ADC_SCTRL register, in this configuration, the first triggering signal will trigger to convert only sample0/sample8, second triggering signal will trigger to convert only sample1/sample9.
Pls have a try.
this would be exactly what I want !
In the ADC config block I didn't found a Option for that.
The ADC samples look like this:
One of the ADC_Sample Blocks:
Is it correct that I set the bit0/bit1 and bit8/bit9 for the ADC_SCTRL Register with the "Delay Sample Until New Input Sync Input Occurs" option ?
Or how I have to set bit0/bit1 and bit8/bit9 for the ADC_SCTRL Register ?
From the PE menu, i think if you check the "Delay Sample Until New Sync Input Occurs", the PE will generate the code to set the corresponding bits in ADC_SCTRL register, but I never have a try. You can check the ADC_SCTRL register in debugger if the bits are set or not after PE has initialized ADC.
I think you can write the ADC_SCTRL Register directly for example with the code:
Hope it can help you
sorry for the delay...
Now I had a try but it doesn't work like you expected.
If I check the "Delay Sample until new Sync Input Occurs" Option in every Sample Block then the code doesn't work successfull and no ADC on End occurs.
I also tried only to activate this Option in ADCA or ADCB samples, because with SYNC0 Input ADCB has the same Trigger Signal as ADCA:
only ADCA "Delay Sample until new Sync Input Occurs" on --> code does not run, no adc on end
only ADCB "Delay Sample until new Sync Input Occurs" on --> no accurate Phase currents
So if I uncheck this "Delay Sample until new Sync Input Occurs" everywhere, I also not have accurate Phase currents.
I think the ADC is triggered three times (Pre-Trigger0,1,2 is activated) and all samples are read with every Trigger.
If I deactivate pre-Trigger 1 and 2 the Phase currents Looks goot and only one adc on end occurs.
Maybe you could help me again ?