KV10Z 75MHz Clock

[stephenmonn]

Iv'e been playing around trying to get a KV10Z chip up and running. I have success programming and debugging with the default clock, but I noticed a few things that don't make sense to me.

1. I only have a 1k pullup on the reset pin, but a 0.1uF cap to ground is recommended. However, if I add any sort of capacitor the reset pin never goes high when powering up until the cap is removed. I've also tried a 0.01uF cap with same results.

2. How do I get the 75MHz clock going? I used the KDSDK project generator to create a blank project which I have attached. I see there is a function 'SystemCoreClockUpdate' in the startup but it never gets called. Do I need to call this somehow? There is also clock configuration details defined in the function 'SystemInit' which is called during startup.

3. I also noticed there are parts of the clock setup in the KDSK that deal with 'enableCapacitor'? What is this enabling? Does enabling it mean I don't need external capacitors?

[jorge_a_vazquez]

Hi Stephen Monn

About your questions:

1. Please check the schematic design of TWR-KV10Z3 and compare with yours, there is a manual reset part, they use a 10K as pullup and a 0.1uF capacitor from reset_b pin to ground:

2. The configuration of the clock depend of various factors, as you can see in the below image the core clock can be configured in different modes:

For example, with ksdk, if you want to configure the clock with 75 MHz you can do something like:

                clock_manager_user_config_t g_defaultClockConfigRun=
                {
                .mcgConfig =
                    {
                        .mcg_mode           = kMcgModeFEE,   // Work in FEE mode.
                        .irclkEnable        = true, // MCGIRCLK enable.
                        .irclkEnableInStop  = false, // MCGIRCLK disable in STOP mode.
                        .ircs               = kMcgIrcSlow, // Select IRC32k.
                        .fcrdiv             = 0U,    
                        .frdiv = 3U,
                        .drs = kMcgDcoRangeSelMidHigh,  // Mid high frequency range
                        .dmx32 = kMcgDmx32Default,        // DCO has a default range of 25%
                    }
                };
                clock_manager_user_config_t * config= &g_defaultClockConfigRun;
                CLOCK_SYS_BootToFee(&config->mcgConfig);

I recommend you to check the ksdk_1.3 example code in {PATH_KSDK_1.3.0}\examples\twrkv10z32, and the reference manual of the KV10 family. You can also check:

Change between clock configurations

FRDMKL02Z Clock configuration

how to change K64F system clock without PE?

KSDK Clock configurations and Low Power modes with Processor Expert

   3. Yes, there are some internal capacitors that can be enable when you want to use an external crystal, but again all depend on how you configure your MCU.

Hope this could help
Have a great day,
Jorge Alcala

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[stephenmonn]

I got the clock working at 75MHz but how can I confgure the clock to 50MHz? I understand the clock dividers in the SIM, but I don't understand the math used to figure out the clock coming from the FLL.

[jorge_a_vazquez]

Hi Stephen Monn

The FLL clock configuration comes from the MCG module. If you check the reference manual for KV10 in the page 479 and 480, it tell you how configure these registers to get the clock frequency that you need.

In this case the FLL is configure with the DMX32 and DRST_DRS registers. For example, to got the FLL working in 48 MHz:

Please check the reference manual and tell me if you have any more questions
Have a great day
Jorge Alcala

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