KE04 FTM pin configue issue

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KE04 FTM pin configue issue

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wangjia
Contributor I

how can you set up the multiplex pins FTM2_CH5 and FTM2_CH1 in KE04z8 chip ?

thanks for anyone watching and help this . 

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wangjia
Contributor I

hi kerry, 

     i already solve and understand these , thanks for your kindly help . 

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kerryzhou
NXP TechSupport
NXP TechSupport

Ok wang wang, if your problem is solved, please help to mark the correct answer for closing the question.


Have a great day,
Kerry

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi wang,

    SIM_PINSEL1[FTM2PS5] used to select the FTM2 channel 5 pinout.

   SIM_PINSEL1[FTM2PS1] used to select the FTM2 channel 1 pinout.

You can find it in the KE04 reference manual, chapter SIM.

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Wish it helps you!


Have a great day,
Kerry

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wangjia
Contributor I

hi kerry, 

    thanks for your kindly response .

    but i already check the RM (MKE04P24M48SFORM.pdf) , there is not the pinsel1 register . 

    and still i have checked the library , also no pinsel1 . 

   i only found the pinsel1 in the KE06 RM . 

   so what i want to know , whether the FTM2_CH5 working for KE04 ? and if yes , how to use it .

   thanks again . 

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi Wangwang,

   Sorry, my fault, I refer to the wrong reference manual:MKE04P80M48SF0RM.pdf before.

   Your chip is KE04z8, so you should refer to MKE04P24M48SF0RM.pdf.

   But don't worry, because there only one FTM2_CH5(PTB5) and FTM2_CH1(PTC1), then you don't need to use the register to choose the multiplex pin. When you enable the FTM2 channel 5, PTB5 is the FTM2_CH5 pin; When you enable the FTM2 channesl 1, PTC1 is the FTM2_CH1 pin.

   Many of the I/O pins are shared with on-chip peripheral functions. The peripheral modules have priority over the I/O, so when a peripheral is enabled, the associated I/O functions are disabled.

   ALT0 is the lowest priority, and ALT7 is the highest priority.

Wish it helps you!

If you still have question, please let me know!

Have a great day,
Kerry

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