Hi all,
Just wanted to share my Experience regarding the problem.
The solution proposed by Bill worked for me (We changed the "EREFS" bit in MCG_C2from "1" to "0" by changing the value of “SYSTEM_MCG_C2_VALUE” from 0x24 to 0x20). Thanks Bill
My Scenario is as follows:
1. Moved From MK60 to MK66 due to RAM limitation.
2. 50MHz external Oscillator connected to MCU (PTA18) as well as connected to Phy (KSZ8081RNA from Freedom Board).
3. First it didn't work because the 50MHz RMII clock could reach the EnetMac.
4. To check that rest of the hardware is fine, I just sent the OSCERCLK0 out (e.g to pin PTA6) and then looped it back to PTE26 as RMII clock to EnetMac module. This worked fine and confirmed that rest of the hardware is fine.
5. Finally tried the solution proposed by Bill (We changed the "EREFS" bit in MCG_C2from "1" to "0" by changing the value of “SYSTEM_MCG_C2_VALUE” from 0x24 to 0x20), and it worked which mean the RMII clock is routed internally and need not to be routed externally.
6. I am using the default “system_MK66F18.h” provided by NXP with following options/changes.
#define CLOCK_SETUP 1
/* Value of the external crystal in Hz */
#define CPU_XTAL_CLK_HZ 50000000
/* MCG_C2: LOCRE0=0,FCFTRIM=0,RANGE=2,HGO=0,EREFS=0,LP=0,IRCS=0 */
#define SYSTEM_MCG_C2_VALUE 0x20U /* MCG_C2 */
/* MCG_C5: PLLCLKEN=0,PLLSTEN=0,PRDIV=4 */
#define SYSTEM_MCG_C5_VALUE 0x04U /* MCG_C5 */
/* MCG_C6: LOLIE0=0,PLLS=1,CME0=0,VDIV=0x14 */
#define SYSTEM_MCG_C6_VALUE 0x54U /* MCG_C6 */
Hope this helps others.
lal