Hi Jorge
The K64 has two Flash "planes" (2 x 512K blocks). When writing/erasing any part of a block/plane the complete block is not available for program operation until the operation has terminated.
This means that if you have program and interrupt vectors operating exclusively in the first plane (first 512k) addresses/sectors in the second plane (second 512k) can be modified without any restrictions.
If you however modify anything in the first 512k (which has code and interrupt vectors in operation) you must run the flashing routines in RAM (since the program flash is not available) and you also need to disable any interrupt since they will also cause the vectors and interrupt handling code to be executed - causing a failure since the Flash plane cannot be accessed. [An exception would be if the interrupt vectors are in SRAM and also all interrupt handling code are also in SRAM].
If you look carefully you should find a description of the flash being constructed of two planes, which is giving the information about what is possible and what needs to be restricted during flash operations.
Regards
Mark