Sure, here you are:
/* Configuration for enter RUN mode. Core clock = 120MHz. */
const clock_manager_user_config_t g_defaultClockConfigRunIrc48 =
{
.mcgConfig =
{
.mcg_mode = kMcgModePEE, // Work in PEE mode.
.irclkEnable = true, // MCGIRCLK enable.
.irclkEnableInStop = false, // MCGIRCLK disable in STOP mode.
.ircs = kMcgIrcSlow, // Select IRC32k.
.fcrdiv = 0U, // FCRDIV is 0.
.frdiv = 0U,
.drs = kMcgDcoRangeSelLow, // Low frequency range
.dmx32 = kMcgDmx32Default, // DCO has a default range of 25%
.oscsel = kMcgOscselIrc, // Select OSC
.pll0EnableInFllMode = true, // PLL0 enable
.pll0EnableInStop = false, // PLL0 disalbe in STOP mode
.prdiv0 = 9U,
.vdiv0 = 1U,
},
.simConfig =
{
.pllFllSel = kClockPllFllSelPll, // PLLFLLSEL select PLL.
.er32kSrc = kClockEr32kSrcLpo,// Rtc, // ERCLK32K selection, use RTC.
.outdiv1 = 0U,
.outdiv2 = 1U,
.outdiv3 = 2U,
.outdiv4 = 4U,
},
.oscerConfig =
{
.enable = true, // OSCERCLK enable.
.enableInStop = false, // OSCERCLK disable in STOP mode.
}
};
osc_user_config_t osc0Config =
{
.freq = OSC0_XTAL_FREQ,
.hgo = MCG_HGO0,
.range = MCG_RANGE0,
.erefs = MCG_EREFS0,
.enableCapacitor2p = OSC0_SC2P_ENABLE_CONFIG,
.enableCapacitor4p = OSC0_SC4P_ENABLE_CONFIG,
.enableCapacitor8p = OSC0_SC8P_ENABLE_CONFIG,
.enableCapacitor16p = OSC0_SC16P_ENABLE_CONFIG,
};
But keep in mind I am using internal 48Mhz osc. It is impossible to use 24MHz external crystal.