K61 crash after "RTC alarm" on wakeup after STOP

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K61 crash after "RTC alarm" on wakeup after STOP

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evgenik
Contributor IV


I have a problem with MK61 for "STOP" mode operation. I configure MCU, RTC and UART and goes to STOP mode. After MCU wake up with "RTC Alarm" MCU peripheries work unstable and sometimes system gets HardFault event. I have attached project with MCU, RTC and UART configuration. The project idea is work on wake up after STOP mode without system reset.

I tried different driver (from K64 board), but no any effects. Help me, please to find the problem.

Thanks a lot.

Evgeni.

Original Attachment has been moved to: MK61F1N-2.zip

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Hui_Ma
NXP TechSupport
NXP TechSupport

Hi  Evgeni,

I checked with K70 errata file (mask set 4N96B) with below errata info:

2016-07-12_17-38-57.jpg

So, during my test again, I did not connect the debugger tool. Or even did not using the on board OpenSDA tool.

Just using the tower elevator board provide power.

Then, I could find there without hard fault exception any more.

I also checked the K70 reference manual with below note:

pastedImage_1.png

So, I modify the test routine add below code after wake up from stop mode:

pastedImage_2.png

With above code, the UART baud rate will back to correct baud rate and did print the correct characters at terminal.

I attached my updated test code for your reference.

BTW: There did not need to disable K70 MPU, please comment below code:

//MPU_CESR &= ~MPU_CESR_VLD_MASK;


Wish it helps.

Have a great day,
Ma Hui
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evgenik
Contributor IV

Hi Ma Hui.

There are interest moment. When Debugger is connected my system is Wake Up in PEE mode. When Debugger is disconnected - it Wake Up in PBE mode and goes back to desired clock mode.

1. How can I Debug system with STOP mode and Wake Up. In STM32 MCU there are option for DEBUG operation in STOP mode. There are the same option in MK61 MCU?

2. Can I disable DEBUGGER pinouts before goes to STOP mode and reconnect/reinit on Wake Up? (By pins mux changing or port disabling)?

Thanks.

Evgeni

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Hui_Ma
NXP TechSupport
NXP TechSupport

Hi Evgeni,

1. For there with the errata e3964 shows:

The MCU enters a pseudo STOP mode when the debugger is enabled.

I don't recommend customer to debug the system with STOP mode, which is a pseudo STOP mode.

2. Yes, customer can modify the JTAG pins with GPIO function before enter into the STOP mode to disable the debugger connection.


Wish it helps.

Have a great day,
Ma Hui
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evgenik
Contributor IV

Hi Ma Hui.

As I described below, my MCU is wake up in PEE mode and not in PBE mode: C1[CLKS] =0x00, S[CLKST] = 0x03. In pll_init() function there are line MCG1 &= ~MCG_C1_CLKS_MASK that is change (0x02) value of these filelds in C1 and S registers to different one( 0x00 and 0x03). Therefore I can't use if(op_mode == PBE)... code. Can I sent to your email my schematic for check my configuration mismatch?

How can I enable/disable Debugger for Debug use?

Thanks.

Evgeni

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Hui_Ma
NXP TechSupport
NXP TechSupport

Hi

Yes, you could submit a case and indicate assign to Hui Ma at here.

Then using that case, I could get your schematics file.

I don't do any setting with the chip. I just remove the debugger tool with K70 board.

Such as , remove J-Link tool connection from JTAG interface.

It need customer program RTC test application firmware to K70 Flash at first.


Wish it helps.

Have a great day,
Ma Hui
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-----------------------------------------------------------------------------------------------------------------------

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evgenik
Contributor IV

Hi.

1. The value of SCB_CFSR register is 0x00000100.

2. I checked where from occurred HardFault_Handler(). It occured into enter_stop()-> asm("WFI") instruction:

HardFault_Handler.jpg

3. I tried to work without PLL (as you described ) with NO_PLL_INIT. All work without crash but without PLL. and external oscillator. On wake up what_mcg_mode() return mode = 3.

4. How can I on wake up reconfigure PLL use? When I work with PLL on wake up what_mcg_mode() return mode = 8.

Thanks a lot.

Evgeni

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Hui_Ma
NXP TechSupport
NXP TechSupport

Hi  Evgeni,

I checked with K70 errata file (mask set 4N96B) with below errata info:

2016-07-12_17-38-57.jpg

So, during my test again, I did not connect the debugger tool. Or even did not using the on board OpenSDA tool.

Just using the tower elevator board provide power.

Then, I could find there without hard fault exception any more.

I also checked the K70 reference manual with below note:

pastedImage_1.png

So, I modify the test routine add below code after wake up from stop mode:

pastedImage_2.png

With above code, the UART baud rate will back to correct baud rate and did print the correct characters at terminal.

I attached my updated test code for your reference.

BTW: There did not need to disable K70 MPU, please comment below code:

//MPU_CESR &= ~MPU_CESR_VLD_MASK;


Wish it helps.

Have a great day,
Ma Hui
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

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evgenik
Contributor IV

Hi Ma Hui.

I checked your code sample and copies it to my project. There are no big differences was found.

1.My system is continue go to Hard Fault exception on command STOP.

2.Furthermore, when I work without Debugger on UART I view blablabla (​þÎÎÎÎÎÎÎÎÎ>0Î>ÎÀþÎðþÎ>0Î) instead my text as "Start", "Wake up", "Stop". This means that the system is wake up with different bus clock?

Have you any Idea about this issues?

Thanks.

Evgeni.

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Hui_Ma
NXP TechSupport
NXP TechSupport

Hi

I change the K70 MCG clock mode to default FEI mode, the UART doesn't with odd characters printed.

The MCG back from stop mode still kept FEI mode and UART baud rate kept the same before enter into Stop mode.

MCG Setting.jpg


Wish it helps.

Have a great day,
Ma Hui
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Hui_Ma
NXP TechSupport
NXP TechSupport

Hi

1. Could you provide the SCB_CFSR register value when hard fault exception happens?

2. The system clock doesn't back to PEE mode correctly cause the UART baud rate inaccuracy.

    Customer could check to call  what_mcg_mode() function in <mcg.c> file. If the MCG not works in PEE mode, there need to re-initialize the MCG into PEE mode again.


Wish it helps.

Have a great day,
Ma Hui
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Hui_Ma
NXP TechSupport
NXP TechSupport

Hi

Please check attached RTC demo based on TWR-K70F120M board.


Wish it helps.

Have a great day,
Ma Hui
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evgenik
Contributor IV

Hi Ma Hui.

Thanks for your response.

In your code I view interest moments:

1. For what you use the next function

/* Copy any vector or data sections that need to be in RAM */

common_startup();

Are this is must or optional? Are this more effective for FW code or memory?

I haven't start() function. I start from main() where call to MCU and HW periphery initialization (I think that my main() is the same as in your code start()).

2. If I understand right the next code line MUST to be used?

    //Reference manual chapter 6.2.2.5 with note

    //To prevent unexpected loss of clock reset events, all clock monitors should be disabled before entering any low power

    // modes, including VLPR and VLPW.

    MCG_C6 &= ~MCG_C6_CME_MASK;

3. All time I got Hard Fault exception on command STOP (2nd or 3rd call) in DEBUG mode. Are this line in your code can resolve my exeption?

        //During the test generate hard fault execption, check the SCB_CFSR register with LACCVIOL bit set

   //disable MPU to avoid this kind to exception

        MPU_CESR &= ~MPU_CESR_VLD_MASK;

4. When I work with DEBUGGER the system is operated: going to STOP, performs Wakeup on RTS Alarm (with different problems), but without DEBUGGER all time performed system Reset (I hear this). There are possible any problem with my HW or need to check my code configuration?

Thanks.

Evgeni.

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Hui_Ma
NXP TechSupport
NXP TechSupport

Hi Evgeni,

1> Copy vector table from Flash to RAM is optional.

2>  Yes, it is must be used.

3>   If using this code based on the Hard Fault root cause.

       Customer could get hard fault root cause from SCB_CFSR register.

4>   The performance should be same with/without Debugger. If you observe the difference performance on your site?


Wish it helps.

Have a great day,
Ma Hui
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Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

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