K60 port pins state on reset: mandatory external pull-up/down resistors?

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K60 port pins state on reset: mandatory external pull-up/down resistors?

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silentlab54
Contributor III

Hi all,

I'm using the kit TWR-K60D100M-KIT and I'm studying the document Number K60P121M100SF2V2RM (K60 100MHz reference manual); I'm not able to find precise informations about all pin's state at reset; for example, must I insert pull-up or pull-down resistors to give to my external memory bus (connected via flexbus) a known logic state at reset/powerup? (we can extend this example for all pins that have some connections with external devices which require a known logic state at reset/powerup).

Thanks for your help! :smileyhappy:

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Derrick
NXP Employee
NXP Employee

Pulling-up the chip select pin(s) on a memory device (i.e., deselecting it) will result in having it tri-state its data bus pins and ignore the signals on the address bus. During power-up, the MCU will not be driving either bus - the end result being that all of these external signals will effectively "float". This will not cause a problem for the Kinetis MCU as its pins have been configured to properly handle this scenario - they will either "disconnect" or default to being an analog input.

I have never seen this cause a problem with an external memory device. A quick inspection of the schematics for Freescale's K60 Tower board (TWR-K60D100M) and Tower Memory Module (TWR-MEM) shows no pull-up resistors on either address or data bus.

If you suspect that this may cause a problem in your design, I suggest that you contact the vendor of your SRAM to have them verify that their device will not be damaged if its address and data lines are floating while the chip select (and other control pins) are externally pulled up.

Best Regards,

Derrick

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adriansc
Contributor IV

Hi,

All the pins have a default value, this value remains the same until you configure another pin function in MUX field of the PCR register; normally all the pins are analog and high impedance.

Some pins that are connected to flexbus module are disabled by default like PTA24 and some pins are analog inputs like PTB6, so you don not need to place pull up or down resistors.

Here is an application note that explain how to use Flexbus interface for Kinetis Microcontrollers:

http://cache.freescale.com/files/microcontrollers/doc/app_note/AN4393.pdf?fsrch=1&sr=1

Hope this helps.

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silentlab54
Contributor III

Hi Adrian,

thanks for your answer; I have read the Reference Manual about initial pin MUXing and configuration at reset and I've already seen Freescale's document AN4393; my question concerns about the behavior at boot-time of a device connected to FlexBus. For example, I have a SRAM device connected: must I insert a pull-up/down for every signal to avoid the risk of breaking external device with signals in unknown logic state?

If I have to do this, I have to insert in my design a lot of resistors (and this is undesiderable).

Thanks in advance for your answers.


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Derrick
NXP Employee
NXP Employee

I recommend using external pull-up resistors on all FlexBus control signal lines that are connected to external devices - the chip selects, output enables and read/write control lines. This will effectively disable the external memory device during power-up. There should be no need for external pull-ups on the address and data lines (assuming a straight-forward, direct connect circuit implementation). These lines will float briefly during power-up but I've never seen this cause any damage.

Best Regards,

Derrick

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silentlab54
Contributor III

Hi Derrick,

thanks for your answer.

I have some doubts:

  1. Why address and data lines doesn't need pull-up/down? I'm not 100% sure it's sufficient to tie up only control signals.
  2. You have said:

    Derrick Klotz ha scritto:

    These lines will float briefly during power-up but I've never seen this cause any damage.

     There are some circustances in which these lines can float not so briefly (for example, test-production sessions or debug sessions); do you think address and data lines in float condition (not logic level, but near transition level) may damage the SRAM device connected to?

Thanks in advance for your answers. :smileyhappy:

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Derrick
NXP Employee
NXP Employee

Pulling-up the chip select pin(s) on a memory device (i.e., deselecting it) will result in having it tri-state its data bus pins and ignore the signals on the address bus. During power-up, the MCU will not be driving either bus - the end result being that all of these external signals will effectively "float". This will not cause a problem for the Kinetis MCU as its pins have been configured to properly handle this scenario - they will either "disconnect" or default to being an analog input.

I have never seen this cause a problem with an external memory device. A quick inspection of the schematics for Freescale's K60 Tower board (TWR-K60D100M) and Tower Memory Module (TWR-MEM) shows no pull-up resistors on either address or data bus.

If you suspect that this may cause a problem in your design, I suggest that you contact the vendor of your SRAM to have them verify that their device will not be damaged if its address and data lines are floating while the chip select (and other control pins) are externally pulled up.

Best Regards,

Derrick

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