Ok, I have a TWR-K60D100M-KIT tower system with K60 MCU. I am writing simple test programs and just tried to connect a bunch of switches to 8 pins I configured as inputs on port C.
I am accessing it via J8 on the primary side elevator board. I wired it by the provided schematic:
- PTC0 J8-66
- PTC1 J8-67
- PTC2 J8-68
- PTC3 J8-64
- PTC4 J8-69
- PTC5 J8-70
- PTC6 J8-71
- PTC7 J8-72
configured each pin as input, enabled open drain and pull-up resistors. I then threw my switches and read the results back via the KDS debugger, looking at GPIOC_PDIR.
The bits seem to be scrambled.
Is it possible my schematic does not match my board? If there are revision numbers on the schematic and the board, how do I find and interpret them?
Writing this makes me realize that 'open-drain' is a property of an output and is irrelevant to this application. This begs the question whether there are combinations of irrelevant fields in the PCRs that cause problems.
I can find no hint of this in the reference manual, however.