I'm feeding an interrupt source into PTE6 of my K60 and I'm trying to get it to call my application specific ISR. My problem is that my ISR never gets called, and I'm unsure as to what I've missed. What I know is as follows:
I've configured PTE6 to be GPIO (Alt mux = 1) and set the PORT_PCR_IRQC to 0x0A (falling edge triggered IRQ)
The external source is driving PTE6 low (seen on oscilloscope)
The ISF bit in PORTE_BASE_PTR->PCR[6] is going high. My code can poll this and recognises the event.
Bit 6 in PORTE_BASE_PTR->ISFR is going high. My code can poll this and recognises the event.
The code _int_install_isr(INT_PORTE, porteMQXISR, pEvent); puts my function in the MQX interrupt handlers list.
My function porteMQXISR() never gets called.
It seems I must do something else, but I don't know what. Theories so far include:
A - Configure some special register to unmask or route the interrupt signal from PORT E to the NVIC
B - Configure the NVIC to route the interrupt signal to the processor
C - I'm not providing the correct arguements, e.g. vector number to MQX
Can anyone shed any light on this?
Solved! Go to Solution.
Make sure that you are using the _cortex_int_init function to enable the IRQ in the NVIC. For example, you have to use both below functions:
/* install the interrupt routine */
_int_install_kernel_isr (78, FTM_ISR);
result = _cortex_int_init(78, 4, TRUE);
Furthermore you have to place the Vector Interrupts in RAM.
You have to define the below macro in the user_config.h in the BSP and recompile BSP and PSP.
#define MQX_ROM_VECTORS 0
I hope that helps.
Make sure that you are using the _cortex_int_init function to enable the IRQ in the NVIC. For example, you have to use both below functions:
/* install the interrupt routine */
_int_install_kernel_isr (78, FTM_ISR);
result = _cortex_int_init(78, 4, TRUE);
Furthermore you have to place the Vector Interrupts in RAM.
You have to define the below macro in the user_config.h in the BSP and recompile BSP and PSP.
#define MQX_ROM_VECTORS 0
I hope that helps.
You definitely need to do something like this for the NVIC
NVICIP91 = NVIC_IP_PRI91(0x80); NVICISER2 |= NVIC_ISER_SETENA(0x08000000);
And this, to enable the clock gate for port E:
SIM_SCGC5 |= (SIM_SCGC5_PORTE_MASK | (plus other ports you are using));
Thanks for the feedback.
Alejandro, in your posting why do you suggest using _int_install_kernal_isr? Doesn't MQX deal with that?
What does _cortex_int_init do, and where is it documented. I can't find it in the MQX user guide,
Jim, I think you are right about the NVIC as NVICISER2 doesn't have bit 27 set. NVICISPR2 has bit 27 set, so I'm deducing the interrupt is pending but not enabled. NVICIP91 is set to 0xC0. I'd like to use an MQX API call to set up the NVIC rather than go straight to the metal, but I'll give that a try first.
I've checked anf the port E clock is enabled in the SIM_SCGC5.
Success! Adding the statement:
_cortex_int_init(INT_PORTE, 4, true);
gets my ISR called. I don't know what that does in addition to setting the NVIC, but it must be something.
Thanks again.