K60 FNET fnet_cpu_isr() reads register at 0xE000ED04, doesn't exist in docs

[OliverSedlacek]

I'm trying to run the FNET code as found in AN4367 on my MK60FN1M0VMD120 processor. The code hangs and from what I can see it's because it's not servicing the interrupts properly. The code uses a single function called fnet_cpu_isr() for all interrupts which extracts a vector number and then calls a specific handler. The code to extract the interrupt vector is:

fnet_uint8 vector_number = (*(volatile fnet_uint8*)(0xE000ED04));

My problem is that I can find no documentation for any register at 0xE000ED04 or any way of extracting the vector number from the NVIC.

Can anyone explain how this is supposed to work?

[OliverSedlacek]

Thanks, I've just about got there. Interestingly it's not defined in the IAR compiler include file but the debugger knows it as the SCB_ICSR. It's a classic example of the evils of 'magic numbers'.

[chris_brown · Accepted solution]

Hi Oliver,

Register 0xE000ED04 is a part of the Core.  So you won't find any documentation in the Freescale material because it is an ARM IP.  It is documented in the ARM infocenter at ARM Information Center.  It doesn't look their M4 information is up to date but the description on the register you're looking for is in the NVIC chapter of the M3 (which should be the same as what's in the M4).  This register is the Interrupt Control State register and indicates which interrupts have been raised (among other things).

Hope this helps,

Chris