This function config the spi module:
void SpiConfig(uint08 u08SPIModule, uint08 u08SPIMode, uint08 u08SPIInterruptEnable, uint08 u08SPICpol, uint08 u08SPICpha, uint08 u08SPIFrameSizeSlave, uint08 u08SPIBRPrescaler, uint08 u08SPIBRScaler)
{
switch(u08SPIModule)
{
case 0 : /* clock gate */
SIM_SCGC6 |= SIM_SCGC6_DSPI0_MASK;
SIM_SCGC5 |= SIM_SCGC5_PORTA_MASK;
/* pin mux */
PORTA_PCR14 &= ~PORT_PCR_MUX_MASK;
PORTA_PCR14 |= PORT_PCR_MUX(2); //SPI0_PCS0 //PTC4, PTE16, PTD0
PORTA_PCR15 &= ~PORT_PCR_MUX_MASK;
PORTA_PCR15 |= PORT_PCR_MUX(2); //SPI0_SCK //PTC5, PTD1, PTE17
PORTA_PCR16 &= ~PORT_PCR_MUX_MASK;
PORTA_PCR16 |= PORT_PCR_MUX(2); //SPI0_SOUT //PTC6, PTD2, PTE18
PORTA_PCR17 &= ~PORT_PCR_MUX_MASK;
PORTA_PCR17 |= PORT_PCR_MUX(2); //SPI0_SIN //PTC7, PTD3, PTE19
break;
case 1 : /* clock gate */
SIM_SCGC6 |= SIM_SCGC6_DSPI1_MASK;
SIM_SCGC5 |= SIM_SCGC5_PORTB_MASK;
/* pin mux */
PORTB_PCR10 &= ~PORT_PCR_MUX_MASK;
PORTB_PCR10 |= PORT_PCR_MUX(2); //SPI1_PCS0 //PTE4
PORTB_PCR11 &= ~PORT_PCR_MUX_MASK;
PORTB_PCR11 |= PORT_PCR_MUX(2); //SPI1_SCK //PTE2
PORTB_PCR16 &= ~PORT_PCR_MUX_MASK;
PORTB_PCR16 |= PORT_PCR_MUX(2); //SPI1_SOUT //PTE1, PTE3
PORTB_PCR17 &= ~PORT_PCR_MUX_MASK;
PORTB_PCR17 |= PORT_PCR_MUX(2); //SPI1_SIN //PTE1, PTE3
break;
case 2 : /* clock gate */
SIM_SCGC3 |= SIM_SCGC3_DSPI2_MASK;
SIM_SCGC5 |= SIM_SCGC5_PORTD_MASK;
/* pin mux */
PORTD_PCR11 &= ~PORT_PCR_MUX_MASK;
PORTD_PCR11 |= PORT_PCR_MUX(2); //SPI2_PCS0 //PTF16, PTB20
PORTD_PCR12 &= ~PORT_PCR_MUX_MASK;
PORTD_PCR12 |= PORT_PCR_MUX(2); //SPI2_SCK //PTF17, PTB21
PORTD_PCR13 &= ~PORT_PCR_MUX_MASK;
PORTD_PCR13 |= PORT_PCR_MUX(2); //SPI2_SOUT //PTF18, PTB22
PORTD_PCR14 &= ~PORT_PCR_MUX_MASK;
PORTD_PCR14 |= PORT_PCR_MUX(2); //SPI2_SIN //PTF19, PTB23
break;
default: break;
}
ptrSPI[u08SPIModule]->MCR = SPI_MCR_INITIAL_STATE; //set initial state 0x0010001
ptrSPI[u08SPIModule]->CTAR[0] = SPI_CTAR0_INITIAL_STATE; //set initial state 0x0000000
ptrSPI[u08SPIModule]->MCR |= SPI_MCR_MSTR(u08SPIMode); //Configure the module as Master or Slave mode.
if (u08SPIMode == 0 )
ptrSPI[u08SPIModule]->CTAR_SLAVE[0] |= SPI_CTAR_SLAVE_CPHA(u08SPICpha) | SPI_CTAR_SLAVE_CPOL(u08SPICpol) | SPI_CTAR_SLAVE_FMSZ(u08SPIFrameSizeSlave) ;//Configure as Slave Mode with all parameters for configuration.
else
{
ptrSPI[u08SPIModule]->CTAR[0] |= SPI_CTAR_CPHA(u08SPICpha) | SPI_CTAR_CPOL(u08SPICpol) | SPI_CTAR_PBR(u08SPIBRPrescaler) | SPI_CTAR_BR(u08SPIBRScaler); //Configure as Master Mode with all parameters for configuration.
if(u08SPIInterruptEnable == 1) //Check if interrupts will be enabled
SpiInterruptInit(u08SPIModule); //Enable interrupt in SPIx module
}
} //end switch case
} //end function
With this function I receive the data, but the data is saving in the interrupt for SPI0. I add the function interrupt SPI0 ISR.
void SpiMasterReceiveData(uint32 u32SPIValueData[], uint08 u08SPINbytes, uint08 u08SPIModule, uint16 u16SPIDummy[])
{
uint08 i=0;
u08spi_rx_Nbytes_Flag = 1;
//u16SPI_TX_BUFFER = u08Dummy;
for(i=0 ; i < u08SPINbytes ; i++)
{
SpiMasterSendData(u16SPIDummy,1,u08SPIModule,0x0F);
while(u08SpiRxflag == 0){}
//while(Is_busy());
}
for(i=0; i< u08SPINbytes; i++)
{
u32SPIValueData[i] = u32SPI_RX_BUFFER[i];
}
u08spi_rx_index = 0;
i=0;
}
void SPI0_ISR(void)
{
uint32 u32SpiValueRec;
u08SpiRxflag = 1;
u08spi_rx_Nbytes_Flag = 0;
while(!(SPI0_SR & SPI_SR_TCF_MASK)){}
u32SpiValueRec = ptrSPI[SPI0]->POPR ; //read data
u32SPI_RX_BUFFER[u08spi_rx_index] = u32SpiValueRec;
ptrSPI[SPI0]->SR = 0xFFFF0000; //clear Interrupt flag of SPI0
ptrSPI[SPI0]->MCR |= SPI_MCR_HALT_MASK; //stop transmission
u08spi_rx_index++; //Increments the index of the Rx Buffer
}
}