K51DN512 A/D converter anomaly

[johnstrohm]

We are using the K51DN512 on-chip A/D converters to read some conditioned switch inputs.  The switches are connected via a voltage divider network and a bypass capacitor, to provide a known non-rail value for the possible switch values.

We scan the A/D lines of interest at 100 Hz.  The A/D driver is interrupt-driven.  We are doing 16-bit conversions.

With the switch disconnected (open), the normal raw value is about 45100 counts.  There is some noise on the line, but it is down in the two bottom digits, so no more than a few bits worth.

With no switch connected, we see OCCASIONAL bad values from the A/D converter.  We see values down around 14000.  We see typically 10-15 bad values in a 20 MINUTE run.

We considered software corruption, and added logging code designed specifically to cache the values as they were read from the A/D converter.  The values are coming directly out of the A/D, and are not modified by software.

If we change the software, we see the bad values "migrate"  to a different input pin.

Weirdness.

I conjecture that it is a weird noise issue SOMEWHERE, but I have no idea where.

Has anyone else seen anything like this?

[xiangjun_rong]

Hi, all

As you said, pls put 0.1uF cap to the Vrefh and Vrefl pins, BTW, as a test, how about removing the 0.039uF capacitor which is parallel with the 22.1K ohm resistor.

Hope it can help you.

BR

XiangJun Rong

[johnstrohm]

I think I’ve solved it.

Apparently, under certain unknown conditions, possibly involving noise or other activity, ADC0 was throwing an “unexpected” interrupt, with garbage in the converter. I have no idea what it might have been. I did some SERIOUS rework on my code, to tighten down enabling and disabling the interrupt, and the gremlin appears to be dead.

This one was a whole lot more interesting than I really wanted it to be.

John R. Strohm

Senior Staff Software Engineer

SCI Technology, Inc.

13000 S. Memorial Parkway

Huntsville, AL 35803

256.882.4800 x8359 Phone

[email protected]

"Don't make a mess of it." --E. W. Dijkstra

[xiangjun_rong]

Hi, John,

If you use interrupt mode and think that the ADC interrupt occurs unexpectedly,  in the ISR, you can check the COCO bit in ADCx_SC1n, if the bit is set, read sample, otherwise, ignore the ADC result.

Pls have a try.

Hope it can help you.

BR

XiangJun Rong

[xiangjun_rong]

Hi, John,

I susppect that the ADC input pin is float or the tested voltage has high impedance which lead to the bad ADC sample result. If you connect the ADC input channel pin to GND, does the bad ADC samples happen or not?

If the ADC tested signal is float, pls clamped the tested signal to GND or VDD so that the ADC input channel pin is driven. If the tested signal is of high impedance, I suspect that you have to use a buffer(using an OP amp) to change the input impedance.

Hope it can help you.

BR

Xiangjun Rong

[johnstrohm]

I’m not the hardware guy, and I don’t have any way to post a schematic, so please bear with me.

This is a switch conditioning circuit. The switch may close directly to ground, or it may close through a 470 ohm resistor. This gives us two functions on one switch input pin.

The conditioning circuit contains three resistors in series: 1K to Vdd (3.3V), 10K, 22.1K to ground. I THINK the resistors are all 0.1%, but I’m not absolutely certain. I know they are no worse than 1%. There is a 0.039 uF capacitor in parallel with the 22.1K resistor. The switch (and 470 ohm resistor) is tied to the junction of the 1K and 10K resistors. The junction of the 10K and 22.1K resistors goes to the A/D input. Additionally, there is a 100 ohm resistor from the A/D input to another microcontroller discrete output pin. That pin is set up as an open drain driver; we use it for BIT.

For this testing, no switch is connected, and the open drain driver is inactive (turned OFF, floating high). (It is turned on for a short time at the beginning of the run, to verify expected behavior, and then we never touch it again. This part works.)

1K + 10K + 22.1K = 33.1K. 3.3V/33.1K is just a hair under 100 uA, and we expect the circuit to idle at 2.2V into the A/D. This is what we see. When the switch is grounded, we expect to ground the whole circuit, and see only small noise, and we see that. When we ground the switch through 470 ohms, we expect to see a low voltage, and we see that.

What we don’t expect is the occasional rare spike down and back up.

Now, the fifth paragraph of section 3.6.1.2, on page 768, of the K51 reference manual (K51P121M100SF2V2RM.pdf) says “AC current in the form of current spikes required to supply charge to the capacitor array at each successive approximation step is drawn through the VREFH and VREFL loop. The best external component to meet this current demand is a 0.1 μF capacitor with good high-frequency characteristics. This capacitor is connected between VREFH and VREFL and must be placed as near as possible to the package pins.” As far as I can tell from the schematic, that capacitor is not present. I conjecture that this may be what is hurting us. Occasionally, the A/D tries to draw a spike, and the necessary electrons are not available.

John R. Strohm

Senior Staff Software Engineer

SCI Technology, Inc.

13000 S. Memorial Parkway

Huntsville, AL 35803

256.882.4800 x8359 Phone

[email protected]

"Don't make a mess of it." --E. W. Dijkstra

[petec20]

John,

Your description is very good and allows me to draw a good diagram. Firstly I'd say that to include the capacitor across VREFL & VREFH would be a very good move. For test, and if the layout permits it, attaching just about any capacitor, across here would be interesting. The ideal being the recommended 100nF part, surface mount X7R in the smallest geometry. A leaded part may be easy for test.

Looking at the diagram your bad value of about 14000 doesn't really tally with the circuit configuration so it's not like the open drain output is being unexpectedly switched unless it's being sampled as the ADC input descends. If the 14000 value is consistent then this is also interesting. If it were random then probably less interesting.

Be aware that the transient response of the input network is fast enough that it can settle to any value within 1 sample period at 100Hz sample rate. So it could easily respond to noise on the 3v3 rail. Increasing the 39nF cap would damp this but making it large might back power the ADC input on MCU power down. For investigation though making this say 470nF might also reveal something.

If the VREF cap doesn't help, as you're software John, the next suggestions may be of interest......

1) When the bad value appears in the stream, does it go GOOD,GOOD,GOOD,BAD,GOOD,GOOD,GOOD..or does it go

GOOD,GOOD,GOOD,A_BIT_BAD,BAD,GOOD,GOOD,GOOD  ? Or something different?

The first makes me thing of a software glitch. ie the ADC values are always good, just that one gets corrupted every so often. The second makes me think of a hardware glitch being digitised.

2) As the problem is so intermittent, and if you have access to one, hook up a digitising scope to the ADC input, 3v3 rail and VREFH. Include in the software some code that produces a pulse on a spare MCU output to trigger the scope with when something bad appears internally. Take care that the scope probes ground leads are short and connected local to the VREF & ADC input circutry. Short stubby ground leads are good. That might help you draw a line between an internal and external problem.

3) If no scope then reconfigure the code to not use interrupts. The idea being to remove anything that might be glitching the ADC process. Or stop any PCB circuit loads being switched.

Hope that helps.

[petec20]

Hello John,

  To help try to figure out what's wrong here would put up a circuit diagram of the resistors switch/es and ADC input. Plus a layout if you can.

So in a 20min run you see 10-15 bad values out of (20 x 60 x 100 ) = 120K samples? And a bad value is about 14000 when you expect about 45100?

Which board is it on?