K27/K28 and SDHC/eMMC

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K27/K28 and SDHC/eMMC

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Contributor III

Hi,

We have struggled a bit to get a SanDisk eMMC (SDINBDG4-8G ) device working with K27/SDHC.

We have used Kinetis SDK 2.7 and MMC/FatFS middleware and it is now working running exFAT file system.

The SDHC module is running at 40MHz/8-bit after the initial 400kHz/1-bit eMMC commands.

Many of the problems were because of incorrect pull-ups on external CMD/DAT lines, but also the fact that we need to disable the Memory Protection Unit (MPU) for this to work : 

SYSMPU->CESR &= ~SYSMPU_CESR_VLD_MASK; // MPU is disabled. All accesses from all bus masters are allowed.

If this is not added before using SDHC, the SDHC communication fails during initial commands with following interrupt set.

K27 Reference Manual : 

Table 61-7. SDHC status for CCE/CTOE Bit Combinations  :

DMAE

DMA Error

Occurs when an Internal DMA transfer has failed. This bit is set to 1, when some error occurs in the data

transfer. This error can be caused by either Simple DMA or ADMA, depending on which DMA is in use.

The value in DMA System Address register is the next fetch address where the error occurs. Because any

error corrupts the whole data block, the host driver shall restart the transfer from the corrupted block

boundary. The address of the block boundary can be calculated either from the current DSADDR value or

from the remaining number of blocks and the block size.

I found the tips about the MPU way down in long 8 year forum post for a different kinetis device.

So my question is is this a known issue in Kinetis devices, or have we misunderstood something ?

Is there a way to avoid disabling the MPU ?

 

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NXP TechSupport
NXP TechSupport

Hi Eldar, I hope you're doing well!

 

Individual Bus Master permissions can be assigned in the Region Descriptor n, Word 2 (MPU_RGDn_WORD2) and Region Descriptor Alternate Access Control n (MPU_RGDAACn) registers of the MPU to allow access to only certain sections of the MPU.

 

The eSDHC Bus Master is assigned to number 4 of the MPU Logical Bus Master Numbers, so permissions for this bus can be changed to allow read/write permission to this bus master, to avoid enabling permission for all of the other present bus masters.

 

More information about this can be found on the K27's and K28's Reference Manuals section 22.4.

 

Please let me know If you need any more information.

 

Best regards,

Sebastian

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Contributor III

Hi Sebastian,

Thank you for useful feedback.  I was not aware of this option, I will implement it.

Best Regards, Eldar

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NXP TechSupport
NXP TechSupport

Hi Eldar, I hope you're doing well!

 

Individual Bus Master permissions can be assigned in the Region Descriptor n, Word 2 (MPU_RGDn_WORD2) and Region Descriptor Alternate Access Control n (MPU_RGDAACn) registers of the MPU to allow access to only certain sections of the MPU.

 

The eSDHC Bus Master is assigned to number 4 of the MPU Logical Bus Master Numbers, so permissions for this bus can be changed to allow read/write permission to this bus master, to avoid enabling permission for all of the other present bus masters.

 

More information about this can be found on the K27's and K28's Reference Manuals section 22.4.

 

Please let me know If you need any more information.

 

Best regards,

Sebastian

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