K22 FRDM CDC Demo with IRC48?

[embeddedmasters]

Hello,

  We have been working on converting from using the PLL for USB/System/Core Clocks to just using a IRC48M.  In going back to a simple USB Example being the CDC example for the K22 FRDM board it is interesting that the XTal-Less capability of the K22 is a STRONG feature but the CDC example does not include a IRC48 Clock Example that works?  In inspecting the firmware briefly I see that the Vlpr clock config mode selects the IRC48 as the PLLFLLSEL but if one runs the CDC out of the box with this clock configuration the K22 USB port does not enumerate correctly.  I would have initially thought this was because the CORE_CLOCK_FREQ = 4MHz as defined in board.h when this mode is selected so this was quickly changed to 20MHz.  I did not think it would that simple and it wasn't.

That being said could someone provide some insight as to the remaining steps needed to get this example running using the IRC48 for the USB Clock Source?  I don't think it is far off...

Seems like having a couple of Clock Config examples using the IRC48 would be ideal to showcase this feature say one with the 4MHz feeding the PLL for the MCGOUT and one entirely driven by the IRC48 seems like it would be quite useful also.

Regards,

Frank

[mjbcswitzerland]

Hi

The uTasker project allows 4 CDC to UART bridges and RNDIS composite running on the FRDM-K22F from either crystal, IRC48M direct, or PLL or FLL referenced to IRC48M or IRC (using crystal-less mode, including automated errate workarounds for early silicon).

See http://www.utasker.com/kinetis/FRDM-K22F.html for FRDM-K22F

and http://www.utasker.com/kinetis/MCG.html for some IRC48M clocking and errate workaround information.

It is not clear exactly which of these possibilities you would like to use for your work but if you could specify exactly I may be able to show you the specific code needed.

Eg. for direct IRC48M clocking (no PLL/FLL):

#define RUN_FROM_HIRC // clock directly from internal 48MHz RC clock

#define FLEX_CLOCK_DIVIDE    2 // 24MHz

#define FLASH_CLOCK_DIVIDE   2 // 24MHz

#define BUS_CLOCK_DIVIDE     1 // 48MHz

#define USB_CRYSTAL_LESS // use 48MHz IRC as USB source (according to Freescale AN4905 - only possible in device mode)

The rest is fully automated (no additional coding needed) and below is the result shown by the uTasker FRDM-K22F simulator.

Regards

Mark

[mjbcswitzerland]

Hi

I have attached a couple of binaries for the FRDM-K22F - one operating directly from IRC48M and the other using IRC48M as PLL input; both cases using crystal-less USB device and not the external crystal.

CDC driver operates with a command ine menu on it when connected or can be commanded to bridge to a UART (in the USB menu). Driver for CDC can be found at the FRDM-K22 link in previous post.

You could also load these to your board and use the debugger to see how the registers are set up and copy to your initialisation.

Regards

Mark

[embeddedmasters]

Hi Mark,

  While this is helpful for testing to validate one of our end goals in that the Kinetis Bootloader is failing after an update when the PEE mode is enabled we need a USB example working with the 48MHz IRC to test with.  A binary doesn't really help anyone understand or show how to go about this.  Until Freescale/NXP provides source that shows how to go about this unfortunately it is not all that helpful.

We are familiar with AN4905 which everyone refers to.  If it is that simple then my suggestion is that NXP have one of their FAE's or Applications Engineers modify the CDC example to work with the IRC48.  Until then unfortunately this doesn't solve our problem. 

Can someone please expand on the K22 CDC Example and assist with how to get it working with the IRC48?

Regards,

Frank

[mjbcswitzerland]

Frank

There is nothing CDC specific so you only need to modify the initialisation.

I have copied "all" code - it is only a few lines - that is needed to configure the K22 chip and its USB to run everything directly from IRC48M below so that you can immediately use it if you prefer not to wait.

Regards

Mark

.. clock initialisation

MCG_C2 = MCG_C2_EREFS; // request oscillator

OSC0_CR |= (OSC_CR_ERCLKEN | OSC_CR_EREFSTEN); // enable the external reference clock and keep it enabled in stop mode

MCG_C7 = MCG_C7_OSCSEL_IRC48MCLK; // route the IRC48M clock to the external reference clock input (this enables IRC48M)

SIM_CLKDIV1 = (((SYSTEM_CLOCK_DIVIDE - 1) << 28) | ((BUS_CLOCK_DIVIDE - 1) << 24) | ((FLEX_CLOCK_DIVIDE - 1) << 20) | ((FLASH_CLOCK_DIVIDE - 1) << 16)); // prepare bus clock divides

MCG_C1 = (MCG_C1_IREFS | MCG_C1_CLKS_EXTERN_CLK); // switch IRC48M reference to MCGOUTCLK

while ((MCG_S & MCG_S_CLKST_MASK) != MCG_S_CLKST_EXTERN_CLK) { // wait until the new source is valid (move to FBI using IRC48M external source is complete)

}

MCG_C2 |= MCG_C2_LP; // set bypass to disable FLL and complete move to BLPE (in which PLL is also always disabled)

.. Now the CPU is operating at 48MHz (when SYSTEM_CLOCK_DIVIDE is 1) and its bus and flash clocks are at the requested speeds
.. USB clock mode initialisation (before powering USB)

SIM_SOPT2 |= (SIM_SOPT2_USBSRC | SIM_SOPT2_PLLFLLSEL_IRC48M); // set the source to IRC48M

SIM_CLKDIV2 = SIM_CLKDIV2_USBDIV_1; // no divide when IRC48M is used

... now power up the USB controller and reset it

.. now enable clock recovery

USB_CLK_RECOVER_IRC_EN = USB_CLK_RECOVER_IRC_EN_IRC_EN; // enable 48MHz IRC clock and clock recovery (this may have been disabled by the USB reset command)

USB_CLK_RECOVER_CTRL = USB_CLK_RECOVER_CTRL_CLOCK_RECOVER_EN;

.. start working with USB device