We've got a 16MHz crystal hooked up to a K20FX512, and we're trying to configure it in PEE mode to generate a system clock at 120MHz and a bus clock at 60MHz. The code gets through the MCG initialisation, but then whether we generate a PWM out of one of the timers, or setup UART5, we get speeds twice what we're expecting. The setup code is:
SIM_CLKDIV1=(0<<28)|(1<<24)|(3<<20)|(7<<16); //120 system, 60 bus, 30 flexbus, 15 flash
SIM_SOPT2=(SIM_SOPT2&~(0b11<<16))|(0b01<<16); //PLL0CLK
OSC0_CR=(1<<7);
OSC0_CR|=(1<<1); //8pF
MCG_C2=0b00101100;
MCG_C1=0b10100000; //External Reference as system clock -> 16mhz/512=31.25khz
while(!(MCG_S&(1<<1))); //Wait for OSCINIT0
while((MCG_S&(1<<4))); //Wait for !IREFST
while((MCG_S&(0b11<<2))!=(0b10<<2)); //Wait for CLKST=External Clock
MCG_C5=0b01000001; //PRDIV=2
MCG_C6=0b01001110; //PLL selected, x30=240Mhz
while(!(MCG_S&(1<<5))); //Wait for PLLST
while(!(MCG_S&(1<<6))); //Wait for LOCK0
MCG_C1=0b00100000; //PLL as system clock
while((MCG_S&(0b11<<2))!=(0b11<<2)); //Wait for CLKST=PLL
In case I've missed something obvious here, the PWM and UART setups are:
FTM3_SC=0b00001111; //Bus/128 = 468750Hz
FTM3_MOD=46875; //10Hz
FTM3_C1SC=0b00100100; //Edge Aligned PWM Set on match
FTM3_C1V=46875/2;
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tempbd=60000000/16/9600;
UART5_C2=0;
UART5_C1=0;
UART5_BDH=tempbd>>8;
UART5_BDL=tempbd;
UART5_C3=0b00001111;
enable_irq(INT_UART5_RX_TX-16);
UART5_C2=0b00111100;
Regards,
Alex.