K10 FlexCan RX FIFO Filter

[tobias_mrs]

Hello
I use a K10 with CAN.
No I have enabled the RX FIFO and have to use the CAN Filter but now I have some troubles with it.

The filter don't work like expected. I want only alow standard messages with bit 7,8,9 set at ID 0x380. I think I shut have a mask with 0x380 and a filer ID with 0x380

//self reception enabled by default
          *canx_mcr_reg[ptr_can_handle->can_handle_number] &= ~CAN_MCR_SRXDIS_MASK;

          // set global receive mask
          *canx_rxmgmask_reg[ptr_can_handle->can_handle_number] = 0xE0000000; // 0x1FFFFFFF;

          //enable individual masking and queue
          *canx_mcr_reg[ptr_can_handle->can_handle_number] |= CAN_MCR_IRMQ_MASK;

          //disable local priority
          *canx_mcr_reg[ptr_can_handle->can_handle_number] &= ~CAN_MCR_LPRIOEN_MASK;

#if ENABLE_CAN_RX_FIFO == 1
         //enable RX FIFO
        *canx_mcr_reg[ptr_can_handle->can_handle_number] |= CAN_MCR_RFEN_MASK;
        //configure number of RX FIFO filters
 //       *canx_ctrl2_reg[ptr_can_handle->can_handle_number] |= CAN_CTRL2_RFFN(0); // default

        //mailboxes reception priority
        //matching start from FIFO
        *canx_ctrl2_reg[ptr_can_handle->can_handle_number] &= ~CAN_CTRL2_MRP_MASK;
#else
        //disable RX FIFO
        *canx_mcr_reg[ptr_can_handle->can_handle_number] &= ~CAN_MCR_RFEN_MASK;

        //mailboxes reception priority
        //matching start from mb
        *canx_ctrl2_reg[ptr_can_handle->can_handle_number] |= CAN_CTRL2_MRP_MASK;
#endif
          //disable abort functionality
          *canx_mcr_reg[ptr_can_handle->can_handle_number] &= ~CAN_MCR_AEN_MASK;

          //ID acceptance mode is FORMAT_A
          *canx_mcr_reg[ptr_can_handle->can_handle_number] |= CAN_MCR_IDAM(FORMAT_A);

          //disable entire frame arbitration comparison
          *canx_ctrl2_reg[ptr_can_handle->can_handle_number] &= ~CAN_CTRL2_EACEN_MASK;

          //remote request frame stored
          *canx_ctrl2_reg[ptr_can_handle->can_handle_number] |= CAN_CTRL2_RRS_MASK;

          //set no of MBs
          reg_val = *canx_mcr_reg[ptr_can_handle->can_handle_number];
          reg_val &= ~CAN_MCR_MAXMB_MASK;
          reg_val |= ((HAL_CAN_NUMBER_OF_CHANNELS - 1) << CAN_MCR_MAXMB_SHIFT) & CAN_MCR_MAXMB_MASK;
          *canx_mcr_reg[ptr_can_handle->can_handle_number] = reg_val;

          //lowest buffer no transmitted first
          *canx_ctrl1_reg[ptr_can_handle->can_handle_number] |= CAN_CTRL1_LBUF_MASK;

          //listen only mode deactivated
          *canx_ctrl1_reg[ptr_can_handle->can_handle_number] &= ~CAN_CTRL1_LOM_MASK;

          //set baudrate
          can_set_baudrate(ptr_can_handle->can_handle_number, baud);

          //init all MB structure
          for( i=0; i < CAN_MB_MAX; i++ )
          {
              CAN_CS_REG(canx_base_ptr[ptr_can_handle->can_handle_number], ptr_can_handle->can_handle_mb_idx) = 0x0;
              CAN_ID_REG(canx_base_ptr[ptr_can_handle->can_handle_number], ptr_can_handle->can_handle_mb_idx) = 0x0;
              CAN_WORD0_REG(canx_base_ptr[ptr_can_handle->can_handle_number], ptr_can_handle->can_handle_mb_idx) = 0x0;
              CAN_WORD1_REG(canx_base_ptr[ptr_can_handle->can_handle_number], ptr_can_handle->can_handle_mb_idx) = 0x0;
          }

    mb_interrupt = ptr_can_handle->can_handle_mb_idx; // set interrupt for message box

     //TX MB ?
         ptr_can_handle->can_handle_mb_idx = CAN_TX_MB;
         //set TX MB inactive
          can_mb_code_set(ptr_can_handle->can_handle_number, ptr_can_handle->can_handle_mb_idx, CAN_MB_TX_NOT_ACTIVE);

          //set id default
          can_mb_id_set(ptr_can_handle->can_handle_number, ptr_can_handle->can_handle_mb_idx, 0x0, CAN_BUFFER_ID_EXT);

     //RX MB ?
         ptr_can_handle->can_handle_mb_idx = CAN_RX_MB;

#if ENABLE_CAN_RX_FIFO == 1
         // don't touch MB
         mb_interrupt = 5;  // interrupt on message box 5 is used to indicate a new message at RX FiFo, overwrite normal setting

        //set all message box of FIFO
        for( i=CAN_RX_MB; i < CAN_TX_MB; i++ )
        {
            //set mask default
            can_rximr_set(ptr_can_handle->can_handle_number, i, CAN_BUFFER_ID_EXT, 0xFFFFFFFF);
        }

        // set mask 
        can_rximr_set(ptr_can_handle->can_handle_number, 0, CAN_BUFFER_ID_STD, 0x380 );
        can_rximr_set(ptr_can_handle->can_handle_number, 1, CAN_BUFFER_ID_STD, 0x1FFFFFFF  );
        can_rximr_set(ptr_can_handle->can_handle_number, 6, CAN_BUFFER_ID_STD, 0x380 );
        can_rximr_set(ptr_can_handle->can_handle_number, 7, CAN_BUFFER_ID_STD, 0x1FFFFFFF );
        // set id 
        can_mb_id_set(ptr_can_handle->can_handle_number, 0, 0x380, CAN_BUFFER_ID_STD);
        can_mb_ide_set(ptr_can_handle->can_handle_number, 0, CAN_BUFFER_ID_STD);
        can_mb_id_set(ptr_can_handle->can_handle_number, 6, 0x380, CAN_BUFFER_ID_STD);
        can_mb_ide_set(ptr_can_handle->can_handle_number, 6, CAN_BUFFER_ID_STD);
        can_mb_id_set(ptr_can_handle->can_handle_number, 7, 0x380, CAN_BUFFER_ID_STD);
        can_mb_ide_set(ptr_can_handle->can_handle_number, 7, CAN_BUFFER_ID_STD);

     //set mask default
//     can_rximr_set(ptr_can_handle->can_handle_number, ptr_can_handle->can_handle_mb_idx, CAN_BUFFER_ID_EXT, 0x1FFFFFFF);

     *canx_rxfgmask_reg[ptr_can_handle->can_handle_number] = 0x0E000000;// 0x1FFFFFFF;  //CAN_ID_STD(0x380); //CAN_RXFGMASK_FGM(0x380);

     // set interrupt
    can_imask_set(ptr_can_handle->can_handle_number, mb_interrupt);
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But now my CAN accept messages with ID 0x280 0x080 0x101 and don't accept 0x380?
What doing I'm wrong?

regards Tobias

[tobias_mrs]

No I have found my problem.
I have not initialize the ID filter table at correct way.

The Messageboxes 6 and 7 are not used at the normal way

First set all fields to 1.

        // set all IDs for RX FIFO filter table to 1
        p_fx_fifo_id_table_element = (uint32*) &canx_base_ptr[ptr_can_handle->can_handle_number]->MB[6];  // ID Filter Table Elements starts from MB6
        for( i = 0; i < CAN_TX_MB; i++ )
        {
            *p_fx_fifo_id_table_element = 0x7FFFFFFF;
            p_fx_fifo_id_table_element++;
        }‍‍‍‍‍‍‍

and to set filter and mask

// filter
p_fx_fifo_id_table_element = (uint32*)&canx_base_ptr[can]->MB[6]; // ID filter table elements starts from MB6
        p_fx_fifo_id_table_element+= mb_idx;

        if (ide == CAN_BUFFER_ID_EXT)
        {
            *p_fx_fifo_id_table_element = (id<<1) | (1<<30);  // extended ID bit
        }
        else
        {
            *p_fx_fifo_id_table_element = (id<<19);
        }
//mask
    //stop can
    can_stop(can);

    // use only this one mask
    if (ide == CAN_BUFFER_ID_EXT)
    {
      //set mask for ID (extended)
      CAN_RXIMR_REG(canx_base_ptr[can], mb_idx) = (mask << CAN_ID_EXT_SHIFT) << 1;
    }

    else
    {
      //set mask for ID (standard)
      CAN_RXIMR_REG(canx_base_ptr[can], mb_idx) = (mask << CAN_ID_STD_SHIFT) << 1;
    }

    // restart
    can_start(can);‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍