Is there any way to set K64F gpio at the frequency of 50MHz?

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Is there any way to set K64F gpio at the frequency of 50MHz?

Contributor III

I want to send spi data at the frequency of 50MHz. However, I noticed that the maximum frequency of spi module of K64F is 30MHz (1/2 bus clock).

However, gpio is clocked by system clock. Is there any way to set K64F gpio at the frequency of 50MHz so that it can replace spi?

I just need data outputed from a pin at the frequency of 50MHz.

Many thanks!

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2 Replies

Senior Contributor II

Hello Gloria,

As you saw in the thread Re: Fast GPIO on Kinetis KF22 it is possible to get that frequency but you will keep the CPU working on that and you can't be able to do enough processing to make the application that you comment. Honestly, I don't think that it is possible to make a bit-bang SPI with a 50 MHz clock in the K64F MCU. Also, you will need CPU time to process the data that you will send/receive. The bit-bang SPI will generate overhead. I recommend you to take a look into an external chip dedicated exclusively to the SPI transmissions.

Best regards,


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Senior Contributor III

Yes, 50MHz for 'bursts' can be output by the CPU at '100% busy', (and presumably 60MHz from 120MHz CPU/60MHz bus) but more to the point a bit-bang SPI requires 'code that does stuff' in a loop (or even unrolled), as I created in:

Confirming K22F Clock Frequency

I doubt you will get much better than 15 clocks per loop, or 8Mbits/s from 120MHz cpu for a bit-banged SPI.

Now of course that all assumes you need to stream in/out 'general' data, and strobe with a clock -- presumably with some 'time' between edges of data and clock.  IF you have 'more flash space than time' and ONLY want to 'send', I could envision 256 'output sequence routines', one for each possible byte-pattern of your data, and each would be a simple sequence of 'toggle I/O' instructions that will dither the I/O lines in the necessary order.  IF the clock and data can change at the same time (from one instruction) on one of the clock edges, then I could indeed see where each byte could 'burst' out at the full 50/60MHz, but then plus a little 'overhead' to decode the next byte on a 'computed GOTO' (switch).

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