I am trying to interface two 16-bit wide SDRAM modules with a K65 to form a 32-bit port. I want to use two 2M x16 x4 modules. I have read through the reference manual and it seems that Table 35-12 meets my criteria (9-column address lines). However, there are not enough address lines to connect the bank address lines BA0 and BA1. I don't understand why certain address lines are not used when working with a 32-bit port compared to a 16-bit port. Can you please help me with the correct hardware connections for a pair of 2M x16 x4 bank SDRAM modules?
I see your issue that the two 2M x16 x4 SDRAM with 9 bits conlumn address needs row address from A0 to A13, but the Table 35-12 only have A0~A12 address, one extra address line A13 is required.
Pls refer to the following note that "The maximum SDRAM address size is 128 Mbits." in RM of K65, the SDRAM maximum size the K65 supports is 128M bits, but your SDRAM size is 2M*32*4=256M bits, so if you use two SDRAM chip, you can only use only half of them. so I suggest you use only one.
Hope it can help you