I2S0_RDR1 on MK20DX256VLH7 3N36B, does it work with DMA?

[walterzimmer]

I try to DMA both RDR data ports of a MK20DX256. I seems that RDR1 does not deliver data and remains always zero.

In fact DMA only from I2S0_RDR0 works, but simply replacing the source with I2S_RDR1 does not work, the DMA seem to run freely (i.e. MUCH more isr calls than with RDR0).

DMA from both data ports, gives the first good data on first data port and zero on second data port.

This was observed on a Teensy3.1 by PJRC

All register settings were double checked and should also be no issue, as DMA from RDR0 works, and RDR1 is located only 4 bytes higher.

Question: Is there a known issue with I2S0_RDR1, or using this port as source for DMA?

[xiangjun_rong · Accepted solution]

Hi, Walter,

I have checked the errata of K20DX256, I dis not find any information with is related with your issue.

Firstly, you should configure the PTA16 pin as I2S0_RXD1 function(ALT7) by setting the MUX bits in PORTA_PCR16 while you enable GPIOA gate clock.

Secondly, you should set the RCE bits as 3 in I2S0_RCR3 register.

Furthermore, if you do not use DMA to transfer data, for example, you use only polling mode, and read the I2S0_RDR0/I2S0_RDR1 registers to two variables after the RFR bit in I2S0_RCSR is set, are the variables correct or not?

Hope it can give you clue.

BR

Xiangjun Rong

[walterzimmer]

Thanks for replying.

Unfortunately, I could not find PTA16 in the datasheet I have available (K20P64M72SF1RM  V1.1 (Dec 2012).

The PTA goes only to PTA13.

I only have pin PTC11 for RDR1

BUT, the RCE set to 3 did the trick.

The system I was using predefined a macro that was enabling only (T/R)DR0

knowing the solution, even the reference manual becomes clear!

As DMA worked as expected, I did not try polling the data from FIFO.

thanks a lot